On this picture Digital 0 is the clock signal and Bus is the data signal? What's the sample rate of your USBee? More than 10MS/s? Doesn't look that bad to me. From the speed I'd guess you're using the hardware SPI, aren't you?Can you define "noise problems"? How do these show up?
Do you have decoupling caps on the shift register Vcc pins (0.1uF cap from +5 to Gnd near the Vcc pin)?You could also look at terminating the clock line to clean it up.http://www.fairchildsemi.com/an/AN/AN-393.pdf