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Topic: understanding timer interrupts (Read 1 time) previous topic - next topic

titous


I think he just wants to understand what the original is doing, so he can plug the correct values into the Due library.


That's correct. 

I'm understanding (please correct if wrong) that timer1 is simply setup to interrupt on overflow.  Is it correct to assume that the timer overflows every
Code: [Select]
(F_CPU / 4000000) * TIME_CHUNK; // goes twice as often as time chunk, but every other event turns off pins?

So, using the Due timer/interrupt library I could simply do:
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long freq = (F_CPU / 4000000) * TIME_CHUNK; // goes twice as often as time chunk, but every other event turns off pins
startTimer1(freq, interruptRoutine); // (Frequency, function)


where interruptRoutine is the function that is called upon timer overflow?

Nick Gammon

Quote

Is it correct to assume that the timer overflows every ...


Yes, plus 1.

If the number happens to be 50, it will count 51 times because it includes zero.

Quote
So, using the Due timer/interrupt library I could simply do: ...


I haven't used the Due yet, but in principle that looks OK.

titous


Quote

Is it correct to assume that the timer overflows every ...


Yes, plus 1.

If the number happens to be 50, it will count 51 times because it includes zero.

Quote
So, using the Due timer/interrupt library I could simply do: ...


I haven't used the Due yet, but in principle that looks OK.


Hi Nick!

thanks for the speedy replies and help, I'll get to some testing this week and post back if I'm having any difficulty!

afremont

This is a phase and frequency correct PWM mode, so the counter will count to N, turn around and count back down to 0.  It will then call the overflow ISR.  It doesn't seem to be doing anything other than using ICR1 to set the TOP value (probably because it is double buffered).  So if N is 50, it will generate an overflow every 100 counts.

For example:  If ICR1 was set to 3, the TCNT1 register progression would be to start at 0, 1, 2, 3, 2, 1, 0, 1, 2,....  Since it started at 0, three ticks to get to the TOP and three ticks to get back to 0.

I assume that the overflow ISR is doing something with toggling pins based upon the comments.
Experience, it's what you get when you were expecting something else.

Nick Gammon

In the original the ISR didn't do anything at all because it was misnamed:

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ISR(TIMERx_OVF_vect)

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