I have not studied this Due debug facility, but it appears to be compatible with the JTAG standard Joint Test Access Group. The four pins would be used according to publicly available documentation for JTAG. A "Boundary Scan" should be accessible which consists of a shift register of vast proportions. You can shift out all states represented on latches in a chain of latches. the Boundary Scan is common on a microprocessor. You also may have access to the internal scan chain in the CPU core. That also is a second chain of flip flops in a chain with thousands of bit states representing proprietary and public microprocessor flags and state info.
