I thought i could just use a few AND gate buffers either side of the SPI ram and wire the SCK,MOSI,MISO and CS wires through these to basically turn on and off which of the arduinos is talking/receiving to the RAM at any given time, and control this by sending just a single character over serial to say 'your turn' but its a no go.
The MUX does add another chip but it also means that there can never be hardware contention between the two CPU's SPI pins, worth it I think.
It seems like the and gate outputs are acting as a sink when not outputting a high rather than floating.
i may actually just add a secondary smaller ram chip on the other side of the setup
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