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Author Topic: change ADC clock  (Read 1451 times)
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 for reading analog voltage signal and I need to take 500 sample signals for the voltage sine wave.

frequency voltage signal = 50hz
sample rate = 25 khz

25000/50=500 samples for a period.
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In a dedicated logic, given your current ADC clock (291666Hz), you should read the analog input 500 times per cycle using delayMicroseconds(11) between readings.
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