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Topic: Graphene chips coming, maybe 10 years away. (Read 422 times) previous topic - next topic

GoForSmoke

Woo hooo!

Quote
Scientists master super-fast Graphene microchips - Truthloader

https://www.youtube.com/watch?v=6-thV2llzg0


I find it harder to express logic in English than in Code.
Sometimes an example says more than many times as many words.

JoeN


Woo hooo!

Quote
Scientists master super-fast Graphene microchips - Truthloader

https://www.youtube.com/watch?v=6-thV2llzg0


Will we be able to get 200Ghz tools so we can actually troubleshoot these chips ?

Hope so.  Looking forward to my new 200Ghz 2TS/s oscilloscope...    :)
I have only come here seeking knowledge. Things they would not teach me of in college.

GoForSmoke

I'd be real happy with 640 MHz AVR's, buuuut they'd have to make fast flash as well as transistors at a minimum to pull it off.
I find it harder to express logic in English than in Code.
Sometimes an example says more than many times as many words.

JoeN

#3
Aug 24, 2013, 08:44 pm Last Edit: Aug 24, 2013, 08:49 pm by JoeN Reason: 1

I'd be real happy with 640 MHz AVR's, buuuut they'd have to make fast flash as well as transistors at a minimum to pull it off.



Flash cells are a type of transistor.  Hopefully the grapheme technology allows for a floating gate.

Quote from: Wikipedia

In flash memory, each memory cell resembles a standard MOSFET, except the transistor has two gates instead of one. On top is the control gate (CG), as in other MOS transistors, but below this there is a floating gate (FG) insulated all around by an oxide layer. The FG is interposed between the CG and the MOSFET channel. Because the FG is electrically isolated by its insulating layer, any electrons placed on it are trapped there and, under normal conditions, will not discharge for many years. When the FG holds a charge, it screens (partially cancels) the electric field from the CG, which modifies the threshold voltage (VT) of the cell (more voltage has to be applied to the CG to make the channel conduct). For read-out, a voltage intermediate between the possible threshold voltages is applied to the CG, and the MOSFET channel's conductivity tested (if it's conducting or insulating), which is influenced by the FG. The current flow through the MOSFET channel is sensed and forms a binary code, reproducing the stored data. In a multi-level cell device, which stores more than one bit per cell, the amount of current flow is sensed (rather than simply its presence or absence), in order to determine more precisely the level of charge on the FG.


http://en.wikipedia.org/wiki/Flash_memory

Anyway, the type of memory technology that the AVR uses doesn't really matter at all as long as it is reliable and allows one-cycle access.  If it was implemented in some sort of battery backed up SRAM, as an E/E/PROM (as many microcontrollers memories were in the past), FRAM (new technology), or some new technology that works with graphene well, it wouldn't matter at all to either the application programmer or even to the CPU core itself.
I have only come here seeking knowledge. Things they would not teach me of in college.

GoForSmoke

Flash in an AVR takes an extra cycle more than SRAM to access. IIRC EEPROM is even slower.
I find it harder to express logic in English than in Code.
Sometimes an example says more than many times as many words.

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