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Topic: SPI.h -- MOSI pulled low as SCLK rises (Read 461 times) previous topic - next topic

paladinllama

Aug 30, 2013, 02:21 pm Last Edit: Aug 30, 2013, 02:57 pm by paladinllama Reason: 1
Hello,

I am trying to write a driver for a MAX7301 GPIO expander; straightforward in theory but in practice I'm experiencing unfamilliar problems with the SPI signals themselves.

The MAX7301 operates in SPI data mode 00 (inactive low, data registered on the rising edge of SCLK), but, as SCLK rises, MOSI is pulled down to a logic 0!

I have included two pictures, the first is a single read command, the second a magnification of the first byte so that the glitches in MOSI are easy to see.

The LIME GREEN box contains:
 byte 1) MOSI: The READ command (0x80) ORed with the address of the register (0x04)     MISO: Nothing relevant
 byte 2) MOSI: A NOP [No OPeration] command (0x00)                                                  MISO: Nothing relevant

The PALE YELLOW box contains:
 byte 3) MOSI: A NOP command.     MISO: The bytes seen at the receiving end of MOSI 15.5 cycles ago
 byte 4) MOSI: A NOP command.     MOSI: The contents of the register (is 0x00, should be 0x01)

The GRAY box is the area magnified in picture two,





I would be most grateful for any suggestions what might be the cause of the problem.

edit: thought of a few things that may be useful to know

I have set the HIGH logic threshold of the logic analyser to 3.5V. This is the threshold for the MAX7301, so the dip in MOSI observed isn't necessarily 0V. In fact, my oscilloscope shows that the LOW signal is a dip to just below ~3.5V.

SurferTim

Quote
I have set the HIGH logic threshold of the logic analyser to 3.5V. This is the threshold for the MAX7301, so the dip in MOSI observed isn't necessarily 0V. In fact, my oscilloscope shows that the LOW signal is a dip to just below ~3.5V.

3.5v output on a 5v IC is still HIGH.

Nick Gammon

http://www.gammon.com.au/electronics

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