Go Down

Topic: A General to question to registers --Arduino Due (Read 1 time) previous topic - next topic


Hi there. I try to  configure some registers of the SAM3x8E controller.

But I still dont understand something

I want to configure the TC channel control register  in order so set the  the  SWTRG " bit 2 software trigger to 1" in order  to get software trigger
I dont understand why i can find many adresses

Address: 0x40080000 (0)[0], 0x40080040 (0)[1], 0x40080080 (0)[2], 0x40084000 (1)[0], 0x40084040 (1)[1],
0x40084080 (1)[2], 0x40088000 (2)[0], 0x40088040 (2)[1], 0x40088080 (2)[2]

A screen shot of the register is attached

is it the right way  #define TC1_CCR ((volatile unsigned int *) 0x40080000)   // Date sheet page number 897

I  want to set SWTERG to 1
Thanks in advance !!


Apr 16, 2014, 09:59 pm Last Edit: Apr 16, 2014, 10:01 pm by gogol Reason: 1
Where is the problem here?
You have three timercounters:
Code: [Select]

#define TC0        (0x40080000U) /**< \brief (TC0       ) Base Address */
#define TC1        (0x40084000U) /**< \brief (TC1       ) Base Address */
#define TC2        (0x40088000U) /**< \brief (TC2       ) Base Address */

each of them has 3 channels (see table 37-5 in your linked document) where the offset is 0x00 + channel * 0x40 + 0x00

see   hardware/arduino/sam/system/CMSIS/Device/ATMEL/sam3xa/include/component/component_tc.h
and hardware/arduino/sam/system/CMSIS/Device/ATMEL/sam3xa/include/sam3x8e.h
for constant definitions.


Just set SWTRG, don't worry about address. Here is an example:
Code: [Select]
void tmr_setup ()
  pmc_enable_periph_clk(TC_INTERFACE_ID + 0 *3 + 0); // clock the TC0 channel 0

  TcChannel * t = &(TC0->TC_CHANNEL)[0] ;            // pointer to TC0 registers for its channel 0
  t->TC_CCR = TC_CCR_CLKDIS ;                        // disable internal clocking while setup regs
  t->TC_IDR = 0xFFFFFFFF ;                           // disable interrupts
  t->TC_SR ;                                         // read int status reg to clear pending
  t->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 |           // use TCLK1 (prescale by 2, = 42MHz)
              TC_CMR_WAVE |                          // waveform mode
              TC_CMR_WAVSEL_UP_RC |                  // count-up PWM using RC as threshold
              TC_CMR_EEVT_XC0 |     // Set external events from XC0 (this setup TIOB as output)
  t->TC_RC = TMR_CNTR;              // counter resets on RC, so sets period in terms of 42MHz clock
  t->TC_RA = TMR_CNTR /2;           // roughly square wave
  t->TC_CMR = (t->TC_CMR & 0xFFF0FFFF) | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET ;  // set clear and set from RA and RC compares
  t->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG ;  // re-enable local clocking and switch to hardware trigger source. 


Just set SWTRG, don't worry about address. Here is an example:

To use that code, you have worried about, as you selected TC0, channel 0 (which will be the first of the nine addresses he asked for).
Its a nice example demonstrating the use.

Those are the aliases to the nine addresse he asked for:
which can be found in the previous mentioned header files.

I found it very helpful, when reading the documentation, digging through the CMSIS-definitions (grepping for register names or values) to find example data structures.

Go Up

Please enter a valid email to subscribe

Confirm your email address

We need to confirm your email address.
To complete the subscription, please click the link in the email we just sent you.

Thank you for subscribing!

via Egeo 16
Torino, 10131