put 1284 processors in a 2"x2"x2" cube
Now that would be a good trick.
How will you retain shield compatibility and also have 16-board addressability?
As the stackables can be used with only 5 IO lines the rest are free, they are of course subject to the usual clashing issues but there are probably enough free to allow coexistance with many shields.
The current adapter design just routes the signals and therefore doesn't help in this regard, however I do have plans to make the adapter itself addressable so Arduino shields appear at a single address. Just how practical this is I'm not sure as all 19 Arduino IO lines would have to be isolated and possibly pulled high/low when not selected.
If you are talking over SPI as you say then won't you need at least 4 I/O lines "stolen" for chip select decoding?
The "chip select" (called BRDEN) comes from the decoder chip on the daughter board, therefore only 3 SPI lines are needed. On a smart board this would go to the SS input of the processor, when using an IO expander to the EN pin, and on a dumb board it is used to enable tri-state buffers.
I'll work on a block diagram to (hopefully) make it clearer.