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Author Topic: Push on - use as IP - push off  (Read 740 times)
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nr Bundaberg, Australia
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Hi all,

I have a requirement for a gadget to have power applied and removed at the press of a tactile push button, also the button should be usable as a GP input while the application is running.

The circuit should kill the local 5v circuitry and some external 12v circuitry.

I can do this easily with a latching relay but that's physically too large, a bit clunky, and can be susceptible to vibration. The relay has one advantage though in that no power is used at all when in standby, however I'd rather a solid state solution so I have come up with this circuit.



My theory of operation is as follows.

Push on - gate driven near GND and FET turns on. Power applied to Reg and AVR, AVR drives OP low thus holding the FET on.

Use as IP - Enable internal PUP resistor PB1 work as per normal input while the application is running.

Push off - AVR tri-states OP, 100k pulls gate up, FET turns off, system dies.

The only problem I can see is that the AVR has 12v applied to it's IP when the power is off, however that's through 100k so I would think it is safe?

Will it work? Is it Close? Any better ideas?

EDIT: Schematic updated.
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Rob
« Last Edit: October 23, 2010, 11:49:56 pm by graynomad » Logged

Rob Gray aka the GRAYnomad www.robgray.com

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I think you can do the whole thing in software.

Start with the processor in Power Down.  Pressing the button generates a pin-change interupt which wakes the processor.  Your program waits until the button is released to start normal execution.

A short click (<500ms) is treated as a normal button press and do whatever they are supposed to in your application.

A long click is treated as a request to hibernate.  The trick is to power down a few milliseconds after the button is released.
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nr Bundaberg, Australia
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I didn't think to mention that there is a lot of other external hardware hanging off the regulator input (the 12v) and local hardware (5v) that I'd like to kill as well.

However that's got me thinking. If I'm happy with the hibernate current draw of the AVR and the small amount used by the regulator I could just cut power from everything else and use the software approach. But this would need two FETS, one for 12v and another for 5v.

It's running from a large(ish) solar system so power is important but not to point where I'm worried about every uA.

I'll update the schematic in a minute.

EDIT: Schematic updated

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Rob
« Last Edit: October 23, 2010, 09:16:17 am by graynomad » Logged

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I'd just add a 2N7000 for the OP to prevent the +12V from getting in through the 100k. When the AVR is off there could be enough current going through the ESD diode to charge up the caps on the +5V bus beyond +5V. Maybe, maybe not, but for a $0.05 part, why chance it.

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nr Bundaberg, Australia
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Thanks guys, I think I'll go with the hardware approach so everything is off.

RC, is this what you meant?




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Rob

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Close...I meant something more like this:



A resistor from gate to ground of the N-channel MOSFET would be a good idea too.

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