Thanks for the input, here's MK2.
Following from suggestion by one of the guys at AVRfreaks I'm using a Tiny 861, but if a single 861 is good then two has to be better right?
So this design has a controlling 861 that talks to the emulating chip and also an FTDI cable to a PC. This will allow IO for a monitor program.
Another pin on the emulating chip is brought out to a header to allow the application to trigger an LA or CRO.
Reset is handled by the controlling chip mostly to allow daisy-chaining of two or more emulators.
Mk2 does not allow for HV programming, just normal ISP.
I still might build Mk1 because it is a more geniune emulation, for example you can use AREF with Mk1 but that's not practical with Mk2, but MK2 has a lot more potential for debugging because it has links to the outside world to display data and trigger test equipment.