The I2C bus address is made up of two parts, a 7 bit device address plus a read/write bit forming an 8-bit bus address. The Phillips I2C specification reserves 16 (two groups of
7-bit device addresses. Fast mode (400kHz) also defines a 10-bit (+R/W) addressing mode which is backwards compatible with 100kHz chips.
The AtMega (48/88/168/328) does not impose any restrictions on use of the 16 reserved addresses. As such - this is as the jargon goes - left for the user to implement.
Making a slave respond to multiple addresses only requires updating a single 8-bit mask register (TWAMR). Using this for practical purposes however would require a modification of the I2C library so that the address responded to is made available.