So 26 uSec is 416 clocks.
You could write your own interrupt handler that does not block further interrupts..
http://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.htmlSee the section that talks about this.
ISR(XXX_vect, ISR_NOBLOCK)
Then the additonal latency that the timer interrupt could add would be the 5 clocks to set up the interupt, one more for the SEI, and one or two more more for the instruction after the SEI (which is always executed before the interrupt is taken).
That seems quite small to me, relative to the 416 clocks that 26 uSec accuracy represents.
Hope this helps - have fun