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Topic: MAX7219 LED Matrix 4 in 1 module (8x32) - how many can daisy-chain? (Read 2077 times) previous topic - next topic

n4mwd

Yes it is.
All chips do that, including real or fake MAX chips and also any chip I have come across in the last 40 years.
Please refer to the SPI protocol and the MAX7219 protocol and you will see they are not the same.  The MAX7219 is nothing more than a shift register.  Real SPI chips will not clock if the CS line is high.  The MAX7219 will.  The fake chips do seem to need at least one clock while the CS is low which is not in the real chips specs.

The fake MAX7219 chips take power from signal lines in a destructive way.  They are unreasonably intolerant of signal voltage higher than VCC.

Have you had any success using the fake MAX7219 chips in a long line?  Mine get about 2 feet and then start to fail.  The design length is 18 modules (6 feet).

Grumpy_Mike

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The fake MAX7219 chips take power from signal lines in a destructive way.
I keep saying all chips do. Is this something you don't believe?

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They are unreasonably intolerant of signal voltage higher than VCC.
Well seeing as every data sheet I have ever seen says the input signal has to be less than the voltage powering the chip plus 0.3V then please define what you mean by unreasonable.

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Have you had any success using the fake MAX7219 chips in a long line?
Yes.

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The design length is 18 modules (6 feet).
Now that is just a silly length for chained shift registers running at 1 MHz.

n4mwd


I found no evidence that the real MAX chips exhibit the same dysfunction.  0.3V over might be normal for normal chips, but I believe it is much less for these fakes.

I have attached a screen cap from my logic analyzer.  You can see the spikes on the CLK and LOAD lines.  They are perfectly aligned with the clock transitions - either rising or falling.  CMOS chips will draw a little more power during clock transitions, but it shouldn't be enough to feed back into the inputs.  Normal chips have pin buffers to prevent that sort of thing.

But getting back to the problem, I need to make this work and unfortunately, I'm stuck with these lousy chips.  The MAX7219 design is flawed in that there is no reasonable way to validate that the chip has received the data properly and error free.  If I was to do it again, I would just use an mcu with 16 I/O's to drive the matrix and then daisy chain with an IN SPI and OUT SPI (dual SPI interfaces to the previous and next module).  That way, the data received can be validated and retransmitted if necessary.  The MAX chips are power hogs. 

In this case, I am considering inserting a buffer board in between every 3rd module (300mm).  It would be powered by Vcc at that point so its outputs are unlikely to exceed Vcc after three more modules.

There is obviously two things going on here.  The overvoltage issue plus the buffer current isn't enough to make the trip.

Paul__B

However, as the Vcc line grows in length, and the load from the modules increases, the Vcc can find itself lower than the signal lines.  When this happens, one module at the end can corrupt the entire chain by inserting random spikes on the signal lines.
This is a similar concern to the use of NeoPixel strips.

You haven't really explained what modules you are using.  If you have any concerns about power loss when chaining them, then it is patently obvious that you have failed to correctly supply the power.  Rather than complaining about it, you need for a start, to run a supply cable of adequate gauge not only to the start of the chain, but also in parallel to the end and possibly to the middle as well.

Here is your illustration:


If SPI does not work, just "bit-bang" the control lines; this will give plenty of setup time at each point.  This may take somewhat longer to update your 18 modules, perhaps a couple of milliseconds, but this should be quite adequate for animation.

Grumpy_Mike

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I found no evidence that the real MAX chips exhibit the same dysfunction.  0.3V over might be normal for normal chips, but I believe it is much less for these fakes.
Sorry but it simply can not be true. The problem with over voltage is that the static protection diodes in the chip become forward biased and so conduct to the rail. This can only happen with an over voltage of 0.3V or more above the supply rail. That is simple physics.

You seem to have successfully hijacked this thread.

Paul__B

You seem to have successfully hijacked this thread.
Not unreasonable - different details but essentially the same problem - and at least not stale.  :smiley-lol:

n4mwd

You haven't really explained what modules you are using.  
Thanks Paul.  I am using a custom 8x8 matrix.  It is 100x100mm PCB with individual LED's on one side and the MAX7219 on the other.  The power traces run straight across the bottom and are 2.5mm wide.  There are 5 pin IN and OUT connectors on each end of the power traces.  Male on the input and female on the output.  The design is so that they can be plugged in to each other side by side.  Each MAX chip has a 0.1uF and 10.0uF cap on Vcc and Gnd.  There is a 3D printed plastic cover over the whole thing.

If you have any concerns about power loss when chaining them, then it is patently obvious that you have failed to correctly supply the power.  Rather than complaining about it, you need for a start, to run a supply cable of adequate gauge not only to the start of the chain, but also in parallel to the end and possibly to the middle as well.
Power is clearly going to be an issue.  However, I am seeing the failures at only 4-5 modules.  I also need to clarify that 18 modules is the design goal.  I currently only have 9 of them built.  

I did try running a parallel ground and power lines, but this created more oscillations than before.  It actually worked better without them.  I'm thinking about cutting the PCB ground and power traces every 3 modules and run wires directly back to the power supply.  That way there is no looping and the max voltage drop should be no more than 0.10V.

The 2.5mm PCB traces should be adequate to carry several amps.  According to an online calculator, a 6' run should be about 150pF in capacitance.  The resistance should be about 0.355 ohms.  Each module uses about 100mA or 1.8A total.  Using ohms law and there is a theoretical max drop in Vcc of 0.6V.  All of this is ignoring the connectors and also assuming the entire load is at the end of the chain which it really isn't.

If these were real max chips, the minimum supply voltage is 4.0 volts.  I have no idea what the min Vcc is for these chips.  Since they can self power from the input lines using 3.3V logic, I am guessing that they should work down to 4.0V as well.



In addition to beefing up the power supply lines. what do you think about putting signal line buffers in between every 3rd module?  This would strengthen the signal lines and also limit their output voltage to the Vcc that the buffer is supplied with.  However, if there is noise already on the line, a buffer will amplify that as well.

Another option would be to make home runs of all lines, power and signal, every 3rd module, but I hope it doesn't come to that.


Paul__B

Have you used the software SPI as Marco explains in reply #11?

n4mwd

Have you used the software SPI as Marco explains in reply #11?

I'm not using a library.  I'm using custom firmware.  The SPI is hardware with the exception of CS which is manual bit banged.  So far, optimal CS seems to be to be high normally, then drop low about 2-3 bytes before the end and then about a 1mSec delay after the last falling clock to go back high.  The logic analyzer shows the pattern to be perfectly formed not including the spices added by the display chips.

I think I read somewhere, either in this thread or another, that the 6' long line of modules qualifies the signal line as a transmission line.  As such, I plan to first try to group the modules into 3 and separate the power and signal lines.  Plan A is that I'm going to try to use simple logic buffers first.  If that fails, plan B is to replace them with a 1 Mbit version of the MAX232 so the signal lines will be RS232 levels which should be less susceptible to noise.

Either way and it looks like my beautiful and expensive new circuit boards are fixing to get hacked up.

n4mwd

Thanks everyone for their help.  I finally found the real solution.  Each module needs to be modified to put a 2K resistor in series with the LOAD and CLK lines from the bus to the MAX chip.  That is, the chips have series resistors on their CLK and LOAD inputs, but the bus itself has no resistors from the input to the output of the board.

The bus lines should be push-pull and not open collector like I mentioned before.  With open-collector, the bus speed is limited to about 100KHz.  Because the MAX7219 is not a true SPI chip, I moved the LOAD/CS signal to just before the last byte sent.  This reduces the time where a glitch can cause trouble.

The max chips form a really long shift register and they all do everything at the same time.  So when the CLK signal transitions, all of the shift registers shift at the same time.  This is what was causing the glitches.  The resistors on each MAX chip prevent glitches generated by the fake MAX chips from making it back to the main lines. 

I have run this solution for several days now and not a single glitch or malformed character has appeared.  The bus speed is 8MHz and the physical display is over 6 feet long with 18 jumbo modules.

For the commercial modules, it is also necessary to solder an 0805 10uF cap in parallel with C1.  I also recommend that R1 be changed to 30K unless the display is for outdoors. 

I hope this helps the next guy.

tkbyd

If you want to try your rig with software based on the LEDControl.h library, I can offer...

http://sheepdogguides.com/arduino/aht3matrixLED7219.htm

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