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Topic: [ ATMega328p ] Implementing ISR breaks / freezes program (Read 522 times) previous topic - next topic

Smokehead

EDIT: AVR-LIBC Version is 2.0.0-3

The exact call is like the following:

Code: (Call to build/flash) [Select]

avr-g++ -c -std=gnu++17 -Os -Wall -Wextra -Wpedantic -Iinc -mmcu=atmega328p src/main.cc -o src/main.o
avr-g++ -Os -mmcu=atmega328p src/main.o -o build/app.elf
avr-objcopy -O ihex -j .bss -j .data -j .text build/app.elf build/app.hex
avrdude -v -e -c stk500 -p atmega328p -P /dev/ttyACM0 -U flash:w:build/app.hex:a


That's what is called when flashing the program. I noticed sometimes it seems like the flashing progress changes the fuses.. I doesn't happen everytime but when it does it shows the following message:

Code: (Fuse-Change Error) [Select]

...
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: safemode: hfuse reads as 58
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: safemode: efuse reads as 50
avrdude: safemode: lfuse changed! Was d6, and is now 50
Would you like this fuse to be changed back? [y/n]
avrdude: safemode: hfuse changed! Was df, and is now 58
Would you like this fuse to be changed back? [y/n]
avrdude: safemode: efuse changed! Was ff, and is now 50
Would you like this fuse to be changed back? [y/n]
avrdude: safemode: Fuses OK (E:FF, H:DF, L:D6)


The disassembled code looks like this:
Code: (Disassembled Code) [Select]

app.elf:     file format elf32-avr


Disassembly of section .text:

00000000 <__vectors>:
   0: 0c 94 34 00 jmp 0x68 ; 0x68 <__ctors_end>
   4: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
   8: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
   c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  10: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  14: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  18: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  1c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  20: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  24: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  28: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  2c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  30: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  34: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  38: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  3c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  40: 0c 94 48 00 jmp 0x90 ; 0x90 <__vector_16>
  44: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  48: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  4c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  50: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  54: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  58: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  5c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  60: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>
  64: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt>

00000068 <__ctors_end>:
  68: 11 24        eor r1, r1
  6a: 1f be        out 0x3f, r1 ; 63
  6c: cf ef        ldi r28, 0xFF ; 255
  6e: d8 e0        ldi r29, 0x08 ; 8
  70: de bf        out 0x3e, r29 ; 62
  72: cd bf        out 0x3d, r28 ; 61

00000074 <__do_clear_bss>:
  74: 21 e0        ldi r18, 0x01 ; 1
  76: a0 e0        ldi r26, 0x00 ; 0
  78: b1 e0        ldi r27, 0x01 ; 1
  7a: 01 c0        rjmp .+2      ; 0x7e <.do_clear_bss_start>

0000007c <.do_clear_bss_loop>:
  7c: 1d 92        st X+, r1

0000007e <.do_clear_bss_start>:
  7e: a2 30        cpi r26, 0x02 ; 2
  80: b2 07        cpc r27, r18
  82: e1 f7        brne .-8      ; 0x7c <.do_clear_bss_loop>
  84: 0e 94 6c 00 call 0xd8 ; 0xd8 <main>
  88: 0c 94 7a 00 jmp 0xf4 ; 0xf4 <_exit>

0000008c <__bad_interrupt>:
  8c: 0c 94 6a 00 jmp 0xd4 ; 0xd4 <__vector_default>

00000090 <__vector_16>:
  90: 1f 92        push r1
  92: 1f b6        in r1, 0x3f ; 63
  94: 1f 92        push r1
  96: 11 24        eor r1, r1
  98: 2f 93        push r18
  9a: 8f 93        push r24
  9c: 9f 93        push r25
  9e: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <_edata>
  a2: 90 91 01 01 lds r25, 0x0101 ; 0x800101 <_edata+0x1>
  a6: 01 96        adiw r24, 0x01 ; 1
  a8: 90 93 01 01 sts 0x0101, r25 ; 0x800101 <_edata+0x1>
  ac: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <_edata>
  b0: 81 3a        cpi r24, 0xA1 ; 161
  b2: 97 40        sbci r25, 0x07 ; 7
  b4: 40 f0        brcs .+16      ; 0xc6 <__vector_16+0x36>
  b6: 8b b1        in r24, 0x0b ; 11
  b8: 90 e2        ldi r25, 0x20 ; 32
  ba: 89 27        eor r24, r25
  bc: 8b b9        out 0x0b, r24 ; 11
  be: 10 92 01 01 sts 0x0101, r1 ; 0x800101 <_edata+0x1>
  c2: 10 92 00 01 sts 0x0100, r1 ; 0x800100 <_edata>
  c6: 9f 91        pop r25
  c8: 8f 91        pop r24
  ca: 2f 91        pop r18
  cc: 1f 90        pop r1
  ce: 1f be        out 0x3f, r1 ; 63
  d0: 1f 90        pop r1
  d2: 18 95        reti

000000d4 <__vector_default>:
  d4: 40 9a        sbi 0x08, 0 ; 8
  d6: ff cf        rjmp .-2      ; 0xd6 <__vector_default+0x2>

000000d8 <main>:
  d8: 55 9a        sbi 0x0a, 5 ; 10
  da: 38 9a        sbi 0x07, 0 ; 7
  dc: 5d 9a        sbi 0x0b, 5 ; 11
  de: 80 91 6e 00 lds r24, 0x006E ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
  e2: 81 60        ori r24, 0x01 ; 1
  e4: 80 93 6e 00 sts 0x006E, r24 ; 0x80006e <__TEXT_REGION_LENGTH__+0x7e006e>
  e8: 16 bc        out 0x26, r1 ; 38
  ea: 85 b5        in r24, 0x25 ; 37
  ec: 81 60        ori r24, 0x01 ; 1
  ee: 85 bd        out 0x25, r24 ; 37
  f0: 78 94        sei
  f2: ff cf        rjmp .-2      ; 0xf2 <main+0x1a>

000000f4 <_exit>:
  f4: f8 94        cli

000000f6 <__stop_program>:
  f6: ff cf        rjmp .-2      ; 0xf6 <__stop_program>


Thanks for your help.

Cheers,
Smokehead

Smokehead

SOLVED:

It seems like i accidentally changed some settings on the programmer which lead to an invalid ISP-frequency. After resetting this to 114 kHz it works again. Thank you for your help!

The main topic has been solved and this one has been solved too! Thank you guys!

Cheers,
Smokehead

westfw

It looks like,it should be ok to me.
The only other idea I have is to disassemble the .hex file (instead of the .elf), to make sure everything needed was actually copied.

You could make separate isrs for all the bad interrupt case, then at least you'd know which one was sending you into never-never land...

Smokehead

The issue with the ISRs is solved. I've seen that whatever CMake did pass to the compiler or which compiler it chose it didn't compile any interrupt vectors. After a manual call to the avr-gcc the code worked! It seems like CMake did something which shouldn't happen.

Now and for future projects i'll use simple Makefiles. CMake is good for other projects but i don't think it's worth the hassle for MCUs. You have to "hack" your way through it to make it running and compile without errors (regarding to the -rdynamic bug it has with avr-gcc).

Makefiles seem much more clear to me by now.

Thanks for your effort put into the answers.

Cheers,
Smokehead

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