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Topic: 9-bit DAC using a ternary/quaternary resistor-ladder (Read 41 times) previous topic - next topic

I'm sure most people have seen the project for an 8-bit R-2R resistor ladder DAC to output signals from the Arduino. In 2011 Raronoff posted an example which could output 3 levels per I/O pin by using the input state as a third output level. This means that using n-pins you can get 3^n output levels.

I thought I would go one further and built a DAC that can output 4-levels per each I/O pin. This uses all of the possible pin states (Output '1', Output '0', input, input-pull-up) and an external biasing circuit to create 4-different voltage levels. The quaternary DAC takes these levels and produces 4^n outputs for n-pins.

At first these DACs have poor results, but if you calibrate the DAC using the ADC and then select the closest code to the ideal value you can get quite good results. The resulting mapping needs to be stored in a lookup-table either in SRAM or Flash.


The 6-input ternary DAC gets a 9-bit equivalent (512-levels) output at INL < 0.5LSB
6-input ternary DAC

The 4-input quaternary DAC gets a 7-bit equivalent (128-levels) output at INL < 0.35LSB
4-input quaternary

Despite outputting more codes the quaternary DAC is just a novelty. The large resistors mean it's vulnerable to noise, has glitches, and is fairly slow.





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