And the maximum value of tRST is 2.5us (table 29-12). Typical and minimum values are not given. So my value of tRST = 300ns does not contradict the datasheet.
Actually it's the maximum minimum
. Because, tRST is "Minimum pulse width on /RESET Pin".
So in the absence of minimum and typical, I would read that as the
figure which is the minimum reset pulse. Notwithstanding that it contradicts the chart on page 422.
Of course. What else could it be? There is no 'maximum reset pulse length, as one can mash down on the reset switch for a week and upon release the reset process will complete properly. They simply don't define the minimum minimum reset pulse length for a proper reset, and rather caution that at some value less then 2.5us value it is possible to start a reset process, pins go tri-state, yet not be able to properly complete the reset process. What some seem to want is a Atmel listed specification on reset pulse length that is guareented to cause a faulty reset condition, which they do not and will not supply.