ard_newbie:
The Flash memory is divided into two banks of 256 KBytes and each banck is divided in pages of
256 Bytes.To copy your new firmware from SD card, provided you have already uploaded a first firmware , this first firmware, running from Flash bank 0, will have to copy page by page the new firmware in Flash bank 1 (begins at IFLASH1_ADDR). The bootloader sets the gpnvm bit 1 so you have the possibility to run code from Flash bank 0 or 1 by setting the gpnvm bit 2 yourself.
You have 2 copies of your bootloader loaded at the beginning of each Flash bank (see Atmel application Note AT02333: Safe and Secure Bootloader implementation).
Use the command WP (see datasheet Sam3x 18.4.3) inside a Write subroutine preceded with the Ram Function attribute, or use the IAP function.
The In Application Programming feature is a function located in ROM that can be called by any software application ( at address IROM + 8, see datasheet 20.4.4). When called, this function sends the desired FLASH command to the EEFC and waits for the Flash to be ready. Inside the subroutine, disable interruptions at entrance, and re_enable the previous enabled interruptions at exit (get Primask, disable irq, set primask).Once your new firmware uploaded in Flash bank 1, set the gpnvm bit 2 with the command SGPB
(see datasheet 18.4.3.5) using the IAP function the same way as previously, then read the gpnvm bits 0 to 2 with the command GGPB to ensure they are properly set. Then reset manually your board and it should automatically run from Flash bank 1.Show your code if any pending questions with this.
I am following this pattern/process, but I do not have a successful boot after the restart. Quite honestly, I am not sure what is happening. Do you think you can help?
I am writing to flash1 from sd, then validate, then disabling IRQ, setting bit 1 in GPNVM register, then setting bit 2 to boot from FLASH 1. After restart, nothing happens.
Relevant code (pulled from samples found elsewhere)
__disable_irq();
//Adapted from code found in Reset.cpp in Arduino core files for Due
//GPNVM bits are as follows:
//0 = lock bit (1 = flash memory is security locked)
//1 = Booting mode (0 = boot from ROM, 1 = boot from FLASH)
//2 = Flash ordering (0 = normal ordering FLASH0 then FLASH1, 1 = Reverse so FLASH1 is mapped first)
const int EEFC_FCMD_GGPB = 0x0D; //read bit
const int EEFC_FCMD_CGPB = 0x0C; //clear bit
const int EEFC_FCMD_SGPB = 0x0B; //set bit
const int EEFC_KEY = 0x5A;
//while ((EFC0->EEFC_FSR & EEFC_FSR_FRDY) == 0);
//// Set bootflag to run from FLASH instead of ROM
//EFC0->EEFC_FCR =
// EEFC_FCR_FCMD(EEFC_FCMD_GGPB) |
// EEFC_FCR_FARG(2) |
// EEFC_FCR_FKEY(EEFC_KEY);
//while ((EFC0->EEFC_FSR & EEFC_FSR_FRDY) == 0);
// Set bootflag to run from FLASH instead of ROM
EFC0->EEFC_FCR =
EEFC_FCR_FCMD(EEFC_FCMD_SGPB) |
EEFC_FCR_FARG(1) |
EEFC_FCR_FKEY(EEFC_KEY);
while ((EFC0->EEFC_FSR & EEFC_FSR_FRDY) == 0);
//// Set bootflag to run from FLASH1
EFC0->EEFC_FCR =
EEFC_FCR_FCMD(EEFC_FCMD_SGPB) |
EEFC_FCR_FARG(2) |
EEFC_FCR_FKEY(EEFC_KEY);
while ((EFC0->EEFC_FSR & EEFC_FSR_FRDY) == 0);
// Force a hard reset
const int RSTC_KEY = 0xA5;
RSTC->RSTC_CR =
RSTC_CR_KEY(RSTC_KEY) |
RSTC_CR_PROCRST |
RSTC_CR_PERRST;
while (true);// bye cruel world!