Hi all,
I don't know if it's the right place for that.
Because this board is my first ARDUINO's board, and I thought it could help beginners, I made a blog with a tutorial (sorry in french) about it.
hi philippe,
thank you very much for your work. you may want to update it as it's no longer necessary to import libs from git as they have been now included in library manager...
Thank you for this tutorial !
Merci Philippe pour cet excellent tutoriel en français.
Je l'ai mis en œuvre avec mon Vidor et toutes les étapes fonctionnent parfaitement.
Impatient de lire la deuxième partie.
Philippe il existe une partie du forum pour tous les francophones.
Dans cette zone francophone nous avons deux sous fora importants :
- Un pour les tuto et cours
- L'autre pour exposer des réalisations terminées
Je pense que des informations sur ton tuto auraient leur place dans "Tutoriels et Cours" et pourquoi pas (en abusant) un exemple dans "Réalisations et Projets terminés".
Merci
Hi DjTGv and 68tjs,
thanks for your feedback.
Second part of tutorial on how to program the FPGA is ready to be publish but Dario Pennisi suggested to me to wait a little for their official "way to do it".
I know that some people would like to go further with the FPGA, so I will in all cases publish it this week.
I have rewritten my article several times hoping that even a beginner in electronic could have fun with FPGA programming.
You can find on my website an example of serial terminal.
I have written it without using NIOS or other embedded softcore, just to show you what kind of very cool things we can make.
For the 1920x1080 resolution, I overclocked a little the FPGA so I do not recommend using it for too long.
For 68tjs : J'ai prévenu à l'époque la communauté francophone avec ce message
Petit tuto sur le MKR Vidor 4000 - Tutoriels et cours - Arduino Forum sans aucun feedback. Je serai bien entendu heureux de participer au forum, si cette carte a du succès parmi les francophones.
Regards
Philippe
Hi Philippe,
What I appreciate in your first article is the form & contents. Clear with examples & schematics.
I already days ago download the serial terminal files.
It is great to go without NIOS layers & overclocking targetting the highest perf.
I really think there is something special in this Arduino Vidor 4000 electronic card because it goes a step further in the computing design.
We must promote it.
Regards,
DjTGv
Hi,
1st part of tutorial about FPGA programming is available :
https://systemes-embarques.fr/wp/archives/mkr-vidor-4000-programmation-du-fpga-partie-1/
The second part (PWM and SPI) will be online, in one or two days I hope.
Have fun
Philippe
It works 
Hi guys,
Again thank you for your enthusiasm and hard work.
Let me say that there is no risk to break the fpga by "overclocking" it. Lucky enough it is designed to handle hard work and it will break only if you treat it very badly such as with ESD on pins or very high temperatures.
Back at clocking, the real limit is timing closure for internal logic so as long as you have right timing constraints and timing report is ok it will work reliably. If timings don't close it could still work but may show errant behaviour.
For pins timings are on data sheet. The part we're using has around 640mbps limit on lvds pins so you will be able to drive 1080p30 with no issues if you reduce blanking (nominal 1080p30 requires 740mbps).
Having said this I encourage Philippe on his path as it's showing how performante the fpga can be when programmed bare metal however, like assembler vs c, you will probably get quickly to results if you reuse the existing infrastructure. Of course the two approaches are not mutually exclusive and I can't stop thanking Philippe for his dedication and good work in teaching basics of fpga programming.
My 50 cents on these tutorials is to quickly move away from schematics and jump to RTL as that is much more powerful and in the end easy to read for more complex designs... In any case my opinion may be biased so please keep up with your great work!
Hello Dario,
In french we said "mettre l'eau à la bouche". I really want to use bare assembler to tackle the graphical FPGA Arduino Vidor 4000 perf.
Firstly, I will search in the forum of course. If you have quickstart hint or link it will be welcome too 
Regards,
DjTGv
Hi DJ,
Just start looking at the IP blocks I published. There's some interesting stuff there and more is coming. I encourage you to look at the code starting from the simpler peripherals such as pwm and move up to things such as sdram arbiter or qr code detector. You'll figure out that trying to do everything in the fpga is not always optimal. It's for sure fun but sometimes it's not worth it. For example on QR code fpga is doing the hard part of extracting features but it would have been overkill trying to coalesce data to classify it correctly so that part is done by a processor. In the end it's more efficient and simpler to implement. Of course trying to do everything in hardware is a great training and is instructive so if this is what you're looking at keep going!
Hey Philippe thanks for this (and thanks to 68tjs for flagging it in the French forum as I had missed it initially)
[I’m on a Mac and this makes it less fun to run Quartus Prime in a Linux virtualized environment]
Hi
With delay, here is the second part of the tutorial.
https://systemes-embarques.fr/wp/archives/mkr-vidor-4000-programmation-du-fpga-partie-2/
I tried a didactic approach of VERILOG using the example of an SPI module but I am not really satisfied with the result.
In a future article, I will discuss DVI output in another way.
Have fun
Philippe
Thank you Philippe for the second part of the tutorial based on the Arduino Mkr Vidor 4000.
I can now touch the sky (or not so high my limit)
Hi,
a new article is available :
https://systemes-embarques.fr/wp/archives/generation-dune-trame-dvi-avec-un-fpga/
and I am also proud that the hackaday website talks about my tutorials :
Philippe
Hello all,
Thanks for great hardware and tutorials!
Just want to say - after compiling the template sketch Quartus warns that some output pins (mainly oSDRAM) are stuck at ground. Hope it's Ok and don't worry.
Hello longtolik,
I have checked the datasheet and it's OK with SDRAM signals at ground level.
They just advise to put DQM signal high. I don't know if it's the case in actual configuration.