DAC output at bar = 80
Excellent. Looks to be positioned at 80/360. I think we have got the trigger pulses and the charge pulses looking good. Do these pulses go into/through some high voltage section, or do they go directly to the module under test?
After consulting and thinking about this new system of triggering the CDI I realize that it will likely be timed from the rising edge of the first sine even if that sine is negative or positive first, still first edge.
OK. I think the current code already does that. It always uses the first pulse. Rising is from the lead edge whether its positive or negative. The difference between R and F is that it just adds in the 10 degree pulse width into the timing when it is set to Falling. The start of timing is independent of the first pulse positive or first pulse negative settings.
//set timing start at lead edge of first pulse
if (risefall == 'R')
{
delayPeriodStart = micros();//start looking for response as pulse rises
trigger = true;
}
else //risefall == 'F' set timing at trailing edge of first pulse
{
//convert pulseWidthTime in timer ticks to microseconds
//prescaler 8 = 4us/timer tick
delayPeriodStart = micros() + pulseWidthTime * 4;//start looking for response as pulse falls
trigger = true;
}
The bar length should have no effect on the readings, it is just there to trigger the CDI in another way that has no real relation to the tester.
Correct, bar length does not figure into any of the calculations other than to set the timing between the first and second pulse.
With those settings everything seems to work, but the delay is shown as about 864 when I am giving no delay. That generates the error in the degree advance that I see.
I think we are back to where we were a few posts ago with the simulated response. Did you ever try the test routine I supplied and saw very small delay values?