Is there any information available on how the ESP32 is connected to the FPGA and or SAMD21?
VidorPeripherals/VidorSPI.cpp at master · vidor-libraries/VidorPeripherals · GitHub bottom of the file.
there are two ways to talk with nina. one is using SAM D21 SPI pins routed to MKR headers (and in turn to FPGA) and use FPGA in bypass mode and the other is using FPGA internal SPI peripheral through JTAG, which will save some pins but is a bit slower due to the indirect communication. note that as of today most JTAG communication is bit-banged but it should be accelerated soon.
So it's:
[ processor == (link type) == FPGA == (link type) == pins/processor ]
M0+ == (All IO from M0+) == FPGA == PINS (All IO from M0+)
NINA == (SPI link from NINA)== FPGA == (SPI) == M0+
And there's no way of using more of the IO in the NINA, and rerounting it to the regular Mkr pins?
As you can see from schematics fpga.is connected to almost all pins of Nina so if you want you can route Nina pins to mkr connector or to mini PCIe. At the moment current images can only use Nina pins as iOS to/from fpga.