Question About VidorTestSketch

In the comments we find // The GPIO pins controlled by the FPGA start from 100

  // Ok, so we know now that the FPGA contains the extended GPIO IP
  // The GPIO pins controlled by the FPGA start from 100
  // Please refer to the online documentation for the actual pin assignment

So why is the code then accessing the pins with numbers below 100?

  // Let's configure pin A0 to be an output, controlled by the FPGA
  FPGA.pinMode(33, OUTPUT);
  FPGA.digitalWrite(33, HIGH);

Hi @a2retro,

These comments are incorrect, I've opened an issue on our internal issue tracker to address them, once we have an update we'll write here.