westfw, start with the first section on page 136 of the atmega168 datasheet. I am not able to fully make sense of it all, but it looks like timers 0 and 1 source from different clock inputs (one 8bit vs one 16bit), so even with the shared prescaler logic and settings, they have different frequency outputs; timer 2 is more independent. I wonder what the design considerations were, but I think they were going for maximum variation between the three, while sharing a lot of logic.