LM358 saturates the output

Correct. The DC voltage on the output is not meant to be zero.

That's why you have to put a DC blocking capacitor on the output of the op-amp. Look up 'DC blocking capacitor output of op amp'..... in google.

Yoram:
Regarding the input DC level, in reality I changed the divider on the plus signal so that I get a VCC/2. Basically it should have been two 150K but I had to change the resistors to get this mid point as appears on the sketch///

Your diagram has 5V. So it should be something like 33K between 5V and + terminal, followed by 100K between + terminal to ground. Or, alternatively..... 150K between 5V and + terminal, followed by 450K between + terminal to ground.

I am not worried about the output dc voltage, I know I can remove it with a cap. The problem is that I am not able to locate this dc level consistently at say vcc/2 (or (vcc-1.5)/2) so that I can get the max swing without saturation...

Hi,
This may help;

Tom... :slight_smile:

Yoram:
I am not worried about the output dc voltage, I know I can remove it with a cap. The problem is that I am not able to locate this dc level consistently at say vcc/2 (or (vcc-1.5)/2) so that I can get the max swing without saturation...

That's ok. I was just responding to your comment you made below, where it appears that you assumed that the output DC level should be zero.

Yoram:
Still the output DC voltage at zero input is not zero and can be something like 2-3V. ???.

To get the output DC voltage roughly to be at Vcc/2 ..... you could :

option a) use the 7.5 V source, and use two of the same resistors eg ... 10K and 10K to make a voltage divider.... which will be used to set the + terminal to 3.75V

option b) use the 5 V source, and use an appropriate voltage divider to set the + terminal to around 3.75 V.... such as a 33K resistor and a 100K resistor divider.

Your diagram has a 7.5 V source, which will be Vcc. And your diagram also has a 5 V source, which is where you could use the 33K and 100K divider.

And, finally, you won't get saturation if you decrease the gain of amplifier (by, for example, by replacing the 75K resistor with a smaller one)..... or if you use smaller AC input values.

Your circuit has a common-mode gain of 3x (well, -3x strictly), no wonder it saturates. Make the
feedback resistor 22k or so to limit the output excursions, unless the input amplitudes are small.

Normally a virtual ground would be decoupled to ground to reduce noise (ie capacitor from the
non-inverting input to ground).

What are you doing with the 2nd Op Amp? You cannot just leave it floating. It can go deep into saturation and cause strange effects across the substrate to the other Op Amp section, or go into oscillation. Either can cause the IC to draw excessive amounts of current.

You really need to give us voltages on everything, or we cannot help you.

@Polymorph.

I forgot about the second half of the opamp, this could be the culprit. I will look into terminating it properly and post back.

@MarkT
Even if I am using a single input, where in this case the gain is only x1.5, it saturates way before the output signal reaches the rails boundaries.

Yoram:
Even if I am using a single input, where in this case the gain is only x1.5, it saturates way before the output signal reaches the rails boundaries.

Show your input signal measurements. And show your output signal measurements. This is to make things clear for everybody.

Eg. Set both AC inputs to be zero to begin with. Then increase the amplitude of 1 of the AC signals...... gradually, and slowly. And then, for the case where the output just begins to show onset of clipping --- indicate : what is the peak input AC voltage level (at the node between the 10 microFarad capacitor and the 50K resistor)? And also indicate the output clipping level.

Hi,
Did you look at the link I posted in #8?

Look at the magnitude of the resistors being used.
To obtain 1/2 Vcc use two 10K, not 100K ?

The amp has some level of input impedance that influences the external input components.
The series input resistors make 4K7 or 10K, not 50K.

Thanks.. Tom... :slight_smile:
PS. I have used LM358 and not had your problems.

Output clipping points of the LM358 are not ground and VCC, but (almost) ground and VCC-1.5volt.
An LM358 should NOT be biased at 1/2VCC because of that.
To get max output swing, replace the two bias resistors with a trimpot.
Adjust untill a ~4volt output signal clips symetrically.
Leo..

Wawa:
DC offset on the output should be about 2volt with that 100k:150k divider at the +input of the opamp.

Leo..

The real problem is that the output DC level is not at the same level as the +Vin...
The +Vin it se with the 100K and 150K divider at Vcc*100/150=0.4Vcc, but the Vout DC is not consistent.

So when I test and change VCC I get the following readings:

VCC +Vin VoDC
5 2 2
6 2.4 2.85
9 3.6 5.65
12 4.8 8.00

We can see that as I use higher VCC the Vout DC tends to climb toward the upper rail. It starts when Vcc=5v at 2V which is 0.4Vcc and ends at when Vcc=12V at 8V which is 0.75VCC...

Any logic explanation for this?

@TomGeorge
I will take a second look at the +vin input, but as far as I remember they were consisted with the expected voltage divider.

@Wawa

Wawa:
To get max output swing, replace the two bias resistors with a trimpot. Adjust untill a ~4volt output signal clips symetrically.
Leo..

This is a good practical procedure, but this tuning is exactly what I want to avoid. Couldn't it be designed such that the output Dc level follows the design? see the measurements I posted above..

Can be explained if there is someting wrong with the input caps on the pots.
If there is a DC short/leak to ground there, then the opamp tries to compensate by increasing it's output.
Did you connect the 10uF caps with negative to pot and positive to 50k resistor.
Post a picture of the setup.
Leo..

Hi,
Can you change the values I have highlighted, and recalculate the 75K to give the gain you need with 4K7 or 10K input resistors.


Place a 1uF cap from the junction of the two 10K providing the 1/2 Vcc, to gnd.
10uF is too high for the high values of resistors you are using.

Tom... :slight_smile:

Wawa:
Can be explained if there is someting wrong with the input caps on the pots.
If there is a DC short/leak to ground there, then the opamp tries to compensate by increasing it's output.
Did you connect the 10uF caps with negative to pot and positive to 50k resistor.
Post a picture of the setup.
Leo..

Hi Leo,

You were right the input capacitors were assembled the wrong way. Now the Output DC voltage follows the one of +Vi :slight_smile: Thanks...

I changed the voltage divider to 2x100k and the output signal is centered at Vcc/2. and I can get a max peak to peak voltage that depends on VCC as follows:

VCC MaxVPP
5 3
16 6

So while at 5V the output can swing up to 1.5v close to each rail, at 16V it can only swing up to 5V close to each rail. Any idea why there is a bigger gap as I use higher Vccs, and why most of the voltage is not translated into higher output amplitude.

TomGeorge:
Hi,
Can you change the values I have highlighted, and recalculate the 75K to give the gain you need with 4K7 or 10K input resistors.


Place a 1uF cap from the junction of the two 10K providing the 1/2 Vcc, to gnd.
10uF is too high for the high values of resistors you are using.

Tom... :slight_smile:

Hi Tom
At this point I have a BW of 1-20KHz which is kind of important. Will this not change if I change the caps into 1UF?

Also If I change the 50K into 10K each will it not adversely affect the channel separation?

Thanks

Also If I change the 50K into 10K each will it not adversely affect the channel separation?

No, the virtual ground at the opamp input takes care of that.

However as the pots are 50k you certain do not want to load them with 10k or 4k7, ideally they
would not be loaded at all. With 10k you'd severely distort the linearity (or logarithmic response if
the pot is log law). It would actually be better to use 100k for that reason, although
high impedances have issues with pickup and noise. The existing 50k seems like a not unreasonable
compromise.

A better approach overall is to buffer pot wiper voltage with a unity gain buffer, then the summing
junction resistors can be a nice low (ie low noise) 1k or whatever. For a low noise microphone preamp
you'd have to pay close attention to such issues, but that's not the case here of course.

Good pickup by TG.

OP.... make sure to always include polarity symbols for polarised capacitors in circuit diagrams.

The Vac drawing (from the original diagram) isn't really AC is such..... but is a combination of dc and ac.

Also..... make sure to write the voltage levels in waveform diagrams for making things clear. DC level.... clipping level etc