[WORKFLOW RELEASE] Vidor sample projects are opensource!

Hi John,
a memory map is not available simply because it depends on what you have instantiated in the FPGA.
the only firm thing is that we have reserved the first MB of flash for two FPGA images. since images are smaller than 512K we have set an arbitrary pointer in flash, after the flash images, to which the processor is jumping to execute code.

internally in the FPGA you can get a memory map of the peripherals connected to the processor by looking at the system.h file in the bsp directory generated by the toolchain in the build/software dir of the project