There are Vidor template projects in github. These have FPGA device select and pin mapping is done.
This does have verilog topmodule so you can use this as wrapper or create new top module. I recommend to use it as wrapper.
This github also contains scripts to create that library for arduino (includes app.h file). You create library from your FPGA design and import it to arduino IDE. For this you need go compiler from google (need to compile byteswap command)
After running command "build_all.sh" in NIOS II command shell in project folder (cygwin linux installed with quartus)
Last phase of this script calls assemble_library.sh and this will create library to use with Arduino IDE.
Flashing:
When you upload arduino scketch that contains app.h then programmer part of arduino will detect this and give it to address that's outside of SAMD21 FLASH area and Vidor bootloader will detect it and write it to FPFA configuration memory after golden image.
There are few project templates.
- Full "empty" only with device type, pin outs and port mapped top module.
- Project with basic peripherals. This project have qsys file that contains peripheral modules and nios ii with mailbox for commonication to FPGA. This use JTAG for data communication so you can't use signaltap.
Then there are example project from current Vidor library deliveries if you want to study.
Note:
I'm planning to create project where we are using USB blaster clone sketch for signal tap and uart for data link to FPGA. In this project there are separated. Current status is that I don't have enough time for creating this. Maybe in few months I try to do this and I have to do some specificatoions first for that datalink.
Edit:
Would freq counter to be good example? Maybe up to 100 MHz