Ok, the FOR I=0 TO 1000:NEXT loop is now down to 3sec.
That is a tenfold in speed 
I implemented a CPU FIFO L1-Cache with 4 TLB buffers of 128bytes.
It works great, even with random PEEKs all over the EEPROM.
If the data is in the cache it is returned from RAM.
Else the oldest buffer gets flushed (written if dirty) and a new is read in from the EEPROM.
But there is still a bit of penelty when there is a cache-miss on writes.
Perhaps a greater number of smaller buffers would be better?
Like 32buffers with 16bytes?
How many bytes does EhBasic use for different variables not including strings?