Does anyone know if the UARTS in the Due have hardware buffers/fifos? Or are they expecting the serial library to do the buffering and defaulting to 64-bytes again?
[ I, like others, sometimes modify the serial library (especially on a MEGA project I have) to avoid serial overflows when the sketch has to do some length op like send an email. This extra RAM on this baby would allow me to bump my UART buffers up to 1K or whatever it takes to minimise my serial data loss. ]
The datasheet makes no mention of fifos in the UART or USART sections. They can use DMA, however...
Looking at the source code, in RingBuffer.h:
#define SERIAL_BUFFER_SIZE 64
Also, it looks like buffering is only used for reception, not transmission. From UARTClass.cpp:
size_t UARTClass::write( const uint8_t uc_data )
// Check if the transmitter is ready
while ((_pUart->UART_SR & UART_SR_TXRDY) != UART_SR_TXRDY)
// Send character
_pUart->UART_THR = uc_data;
Hopefully this will soon change to buffered transmit like AVR has used since Arduino 1.0.
No hardware FIFOs.
Thanks guys, I couldn't see any mention in the datasheet either but I thought a newer chip like that probably had something. Still, if I can use the extra RAM to hike up the serial buffers I will be happy.