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Topic: super-cap charger circuit (Read 62 times) previous topic - next topic

tjones9163

Jun 15, 2019, 04:38 pm Last Edit: Jun 15, 2019, 04:38 pm by tjones9163
Hello, i am looking into building a Super-capacitor charging circuit from the site https://circuitdigest.com/electronic-circuits/supercapacitor-charger-circuit-diagram
Here's what I know about the circuit according to the site.
12v goes through D3 and R8 to ground to let you know the circuit is getting power.
12v also feeds the input of the lm317 and puts out 5.3v regulated voltage on the output, according to the resistor feedback circuit.
R3 and R4 form a voltage divider that puts 4.86v on the non-inverting input of the amplifier when the reference voltage placed on the positive plate of the capacitor is fed into the inverting input.
So normally let's say with a dead cap, the non-inverting input will be higher than the CAp voltage and the amplifier will turn on the N-channel MOSFET, allowing current o flow from the drain of the MOSFET and out of the collector to charge the capacitor.
When the capacitor reaches higher than 4.86 volts it will put the output of the amplifier low, turning off the Gate of the Mosfet and at the same time turns on the PNP transistor Q2 lighting the Green LED to let you know that the Capacitor is charged.
Is how i explained it correct?
Thanks

ReverseEMF

#1
Jun 15, 2019, 06:27 pm Last Edit: Jun 15, 2019, 06:38 pm by ReverseEMF
Well, first, I wouldn't call the voltage on the positive terminal of the Super Cap the "Reference Voltage".  The voltage on the Non-Inverting input of U2:A is what I would call the "Ref Voltage", and I would call the Cap voltage, the "Sense Voltage".

12v also feeds the input of the lm317 and puts out 5.3v regulated voltage on the output, according to the resistor feedback circuit.
More like 5.4V

1.25V/1K = 1.25mA
3.3k*1.25mA = 4.13V
4.13V + 1.25V = 5.38V


R3 and R4 form a voltage divider that puts 4.86v on the non-inverting input of the amplifier when the reference voltage placed on the positive plate of the capacitor is fed into the inverting input.
The voltage on the Non-Inverting input will be 4.86V, regardless of what voltage is applied to the Inverting input -- as long as the voltages are within proper operating ranges.

...allowing current o flow from the drain of the MOSFET and out of the collector to charge the capacitor.
Nope.  Out of the Source of Q1.  In other words, current [conventional current] will flow through Q1 from the Drain, to the Source, and out of the Source, into the Super Cap.  Also, there is no "Collector" involved.  Also, I wouldn't even do it this way.  I would either use a P-Channel MOSFET, or an N-Channel, and place it between the Super Cap negative terminal, and ground [Drain to Super Cap neg, and Source to ground].  Especially since the worst-case Gate Threshold is 4V, and that doesn't allow much head room with the current circuit.


...and at the same time turns on the PNP transistor Q2 lighting the Green LED...
Actually, Q2 should be an NPN transistor.  Unless the idea is to use the BE junction as a Zener, but then, there would be no inversion, so the LED would light when Q1 is ON, not when it's OFF.


Other than that, pretty much correct.
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Please DON'T Private Message to me, what should be part of the Public Conversation -- especially if it's to correct a mistake, or contradict a statement!  Let it ALL hang out!!

tjones9163

Actually, Q2 should be an NPN transistor.  Unless the idea is to use the BE junction as a Zener, but then, there would be no inversion, so the LED would light when Q1 is ON, not when it's OFF.



Thank you  for the response, nut isnt Q2s base normally pulled high by 10k resistor and only when the output of the amplifier is LOW can it be activated?

ReverseEMF

... nut isnt Q2s base normally pulled high by 10k resistor and only when the output of the amplifier is LOW can it be activated?
Huh?!?
"It's a big galaxy, Mr. Scott"

Please DON'T Private Message to me, what should be part of the Public Conversation -- especially if it's to correct a mistake, or contradict a statement!  Let it ALL hang out!!

JCA79B

#4
Today at 12:19 am Last Edit: Today at 12:30 am by JCA79B
The base of Q2 is pulled LOW by pin 7 of U2-A, turning OFF Q1 and the LED.
http://www.ti.com/lit/ds/symlink/lm311.pdf
Notice LM311 output is open collector, it's either conducting to ground or high Z.

tjones9163

The base of Q2 is pulled LOW by pin 7 of U2-A, turning OFF Q1 and the LED.
http://www.ti.com/lit/ds/symlink/lm311.pdf
Notice LM311 output is open collector, it's either conducting to ground or high Z.
Thank you for the response, but dont PNP transistor get activated by pulling the base to ground?

JCA79B

#6
Today at 12:50 am Last Edit: Today at 12:55 am by JCA79B
Pulling LOW means connecting to ground. I don't think that LED circuit is correct. If R9 were connected between Q1 gate and the TOP of the LED it MIGHT work?

JCA79B

#7
Today at 01:11 am Last Edit: Today at 01:40 am by JCA79B
I think I see it now, Q2 is drawn upside down, when LM311 output pulls LOW, current will flow from +12V into Q2 emitter (should be at top), out collector (at bottom), through R6 and LED. I think.   :smiley-confuse:
Like This?

herbschwarz

Hi All,
JCA is correct: Q2 must be connected correctly so that it can turn ON!
Also, it would be better to interchange the values of R6 & R7. Now,
look at the gate of Q1: R5 & R9 form a voltage divider so the gate
rests at 6V while U2:A is off. The Vgs(on) will keep the super cap
from taking a full charge. (How can messed-up schematics like
this be published?)
Herb

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