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Topic: Vidor 4000 Encoder example only 16-bit (Read 393 times) previous topic - next topic


Mar 06, 2019, 08:59 pm Last Edit: Mar 06, 2019, 09:29 pm by mbyington
Everything I read online seemed to indicate that the count generated by Encoder example sketch would be Uint32 (and library indicates that the read() method passes back an int32), but from testing with a very high count quadrature encoder (I was using a 47360 count encoder), the counter output wraps at 65535, leading me to believe that the counter on the FPGA is actually Uint16.

Is this the intended logic? Unfortunately it looks like programming the FPGA on the Vidor 4000 on my own is going to be a chore, so I'm a bit hesitant to dig into it to "correct" this.


Well, from the published FPGA code (https://github.com/vidor-libraries/VidorBitstream/blob/release/ip/QUAD_ENCODER/rtl/QUAD_ENCODER.sv) it seems that the FPGA implementation clearly supports 32 bit.

But as not everything is published, we can't built the this FPGA image on our own and therefore it is impossible for the normal user to check that the image on the FPGA is identical with that.


pENCODER_PRECISION parameter is given to IP block from upper level.

I think that repository should contain project folders for currently used FPGA images. For same synthesis as delivered image you need full version of quartus but usually they also have project for lite version.

i think you should check peripheral project and check what is set for pENCODER_PRECISION value. I think these are in QSYS projects.


Anyone had a chance to look into this further? I've been experimenting with VidorBitstream but am having hangups trying to build the projects. It seems to me that this should really work off the shelf with 32-bit values.


For anyone that cares...

Now that I've figured out how the Quartus build files work, I found that the setting for the QUAD_ENCODER_0 subsystem in "build/mkrvidor4000_peripherals_lite_sys.qsys" platform file was set to 16-bit in the VidorBitstream provided files pre-built FPGA files. I'm thinking this was the setup used for the VidorPeripherals Arduino library.

I have since compiled a new library using VidorBitstream source files with those values set to 32-bit and will be testing soon. Fingers crossed.


It works! VidorBitstream with modified Encoder library and FPGA code now returns 32-bit counter value, and will count above 65535!

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