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Topic: Programming the MKR Vidor 4000 (Read 4168 times) previous topic - next topic

Limba

#15
May 23, 2019, 10:01 am Last Edit: May 23, 2019, 10:51 am by Limba
Hello
Please forgive me if this is not the place to ask for help.
I am a new ( very new ) user of arduino mkr vidor 4000 and has already "draw" an example of a FIR filter and check it with modelsim. Looks like it is running OK.
BUT I would like to check it more "fisicaly" . I mean I woul like to use 1 (2) switch for input and see the input and result by serial monitor.
I am using just a clck ... a input bus x (8bit) ... a ouput bus y (11bit).
My idea was to use 1 or 2 switch to force bit 0 and bit 1 of input bus x    .... show on serial monitor the input bus x and also the result output bus y.
I do not know how to do it on the IDE arduino.
-First how to pass bus x and bus y from fpga to "IDE" in order I can play with then how to use it in serial print.
Can you please provide an example to me ?
Best regards
JMCN

I think this should be separated discussion.
I would recommend is serial input. With this you can send test file from PC and also receive result to separated file. This can be done easily with python.
With serial input you reduce risk for invalid input data for filter.

Edit:
Did you use project template from github for FPGA project?
You can do that 2 switch input but remember debounce times etc and it's slow.

If you didn't use github as template:
create simple QSYS with NIOS II (you can use also nios ii f in this, you use usbblaster sketch for this)
put clk/rst input, nios, ram, jtag-serial, 32bit gpio for filter input and output (or 2 separated gpio if you like separated rigisters for them) and connect them.

If I remeber right jtag-serial should route all printf text to eclipse console (scanf should also work from console).
Also gpio should have library for using it. if not it should be pretty simple to use. set bit direction and state or read these. in qsys there should be link to userguide pdf

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