Of course CMOS scales to much faster clock rates with smaller processes and lower voltages - a 1.8V CMOS logic family would be interesting.
I have an old Sci Am special on microelectronics, published some time in the 80's - they forecast that I2L (integrated injection logic) would take over from MOSFET technology. Never happened!
The other feature of TTL that ought to be mentioned is that the static power dissipation of gates is many orders of magnitude higher than CMOS (factor of millions I think) - this means TTL cannot be used for VLSI at all since the quiescent power dissipation would be measured in kW and MW. A chip with 50 TTL gates on it is feasible, with a million gates: totally impossible.