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Topic: Please Sanity-Check My BGA Fanout for PCB Design (Read 2042 times) previous topic - next topic

JoeN

Mar 11, 2013, 09:43 pm Last Edit: Mar 11, 2013, 09:46 pm by JoeN Reason: 1
This was done in DipTrace.  I posted this over on the DipTrace forum but I would love comments from people who use Eagle or any other PCB CAD solutions too so I am posting it here as well.  Hope nobody minds.

I am a very new PCB layout hobbyist. So far, I have successfully made about half a dozen boards and sent them to both OSH Park and Bay Area Circuits and they are coming back just great. My workflow is probably naive, but it works - I get the schematic right, send it to PCB, use auto-place, then place the parts myself to get a nice looking logical board consistent with how users would want inputs and outputs to work and keeping despike caps next to their ICs, etc. Then I do auto-route, which works fine. Now I want to try a BGA part (having soldered some QFNs and TQFPs with no problem) to test my hot-air soldering skills there. Atmel's ATMega2560 CBGA-100 totally defies using this workflow - auto-route will not work. I changed my trace width and via size to be OSH Park's minimums. No go. So after reading some of the threads on DipTrace's forum, I see a suggestion to use the fanout feature in PCB editor. Now, this confused me a bit because it doesn't provide a total fanout for BGA parts, as far as I can see, it just fans to vias. And I take that to mean you are expected to do the fanout yourself at that point using the vias to the bottom level. So this is what I did. To make this work on Atmel's part I had to use 0.006 trace width and clearance, OSH's minimum. I had to use 0.013/0.007 vias, OSH Park's minimum. And on top of that, to keep to 0.006 clearances, I had to change the BGA pads to 0.012. The library pattern had them at 0.016. But it was essential to keep the clearances from violating. Anyway, here is the design:

Top:



Bottom:



Given this, I have a few questions:

1. Given that I changed the pads, do you think this will solder OK? Is it more or less likely to create solder bridges or might be more prone to other types of soldering problems or failures?

2. (this question is very specific to DipTrace so if you are an Eagle Achiever please ignore).  Now that I manually routed this one part, do I have to manually route the rest of the design? To do this test, my schematic was the 2560 itself and nothing else. Once I add additional parts and wires, will the software know how to route to these trace ends or is it going to try to route to the pin (an impossibility)?

3. What else can I do better? Is this a sane design?

Would love any criticism. I am totally new at this and I don't understand all the ramifications. Just designing what seems to make sense.
I will never ask you to do anything that I wouldn't do myself.

MarkT

Any real chip will need decoupling caps close into the pads (on the rear of footprint), depending
on the actual chip - so why freeze a layout into your part, just have the pads.  You'd be wise to
have fiducial(s) close to any BGA part, I gather, to guarantee alignment where it matters. Without
a four-layer board you lose the groundplane too.
[ I DO NOT respond to personal messages, I WILL delete them unread, use the forum please ]

Docedison

MarkT's response was right on the money in every respect but If you need to autoroute that footprint just make sure that the pad names are the same as the schematic's symbol for the controller. This allows the netlister to properly assign nets to appropriate pins. Be certain that each footprint pin label and number is the same as the data sheet. It should autoroute fine...   But get those bypass caps installed. They're like magic bullets for erratic controller operation.

Bob
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"The solution of every problem is another problem." -Johann Wolfgang von Goethe
I do answer technical questions PM'd to me with whatever is in my clipboard

JoeN

#3
Mar 12, 2013, 09:39 am Last Edit: Mar 12, 2013, 09:46 am by JoeN Reason: 1

MarkT's response was right on the money in every respect but If you need to autoroute that footprint just make sure that the pad names are the same as the schematic's symbol for the controller. This allows the netlister to properly assign nets to appropriate pins. Be certain that each footprint pin label and number is the same as the data sheet. It should autoroute fine...   But get those bypass caps installed. They're like magic bullets for erratic controller operation.

Bob


Thanks.  I have bypass caps in all my designs on the appropriate VCC pins.  I am going to use this as my guide:

http://arduino.cc/en/uploads/Main/arduino-mega2560_R3-schematic.pdf

Just as I use the Uno R3 schematic as my guide with the 328P chip.  The only reason they aren't on this diagram is that the point of the diagram is to solve the problem of BGA fanout, an unsolved problem for me, not decoupling supply lines, which is a solved problem.  This is not a complete schematic yet.

I'd like to try a 4-layer design.  It's more expensive but it looks like OSH Park makes it just as convenient as the 2 layer designs.  Too bad nobody out there has 6 and 8 layer options, I guess there is just not enough work to get a board a week or whatever it would require for a PCB house to take it on.  If I did that, do you just designate the two internal layers as being GND and VCC and the outer ones as signal and let the autorouter try to get it right?
I will never ask you to do anything that I wouldn't do myself.

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