the 574 (in fact the '174, '274, '374 and possibly the '474 too) are clocked D-latches. The typical use
for such a chip is in a microprocessor system to gate the system databus into an I/O device only when the
specific I/O address is decoded.
An address decoder is used to drive the clock (common to all the latches), the data bus is then copied to the output
of the latch only when the correct I/O address is present - you have written a value to the device!
For latches with tristate outputs they can be used to read from an I/O device - the OE (output enable)
pin is driven from the address decoder - however latching is not necessary for this, a '244 or '245 can
used (tri-state buffer).
Basically these chips are designed for parallel I/O, not serial I/O like the '595