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Topic: Example of driving ADC and DAC from timer for regular sampling (Read 31130 times) previous topic - next topic

MarkT

Hopefully this may save some people time configuring the Due chip for timer-driven
ADC and DAC conversion.  Took a while to read through the timer-counter section
of the datasheeet!

The hypothetical setup is sampling audio at 48kHz and 12 bit, mono.  Timer counter
TC0 channel 0 is initialized to run in waveform mode at 48kHz (and also to generate
PWM on Arduino pin 2 as it happens, but that's optional).

The ADC and DAC are both set to trigger on the TIO event from the timer, and an EOC
ADC interrupt handler is used to capture the input samples into a circular buffer and also
copied inverted straight to the DAC output FIFO.

So when run this reads pin A0 (which is actually AD7 on the chip, note) and outputs
to DAC0.  Pin D2 also gets the 48kHz clock (but can be disabled by commenting out
the call to setup_pio_TIOA0)


Code: [Select]
void setup()
{
  Serial.begin (57600) ; // was for debugging
  adc_setup () ;         // setup ADC
 
  pmc_enable_periph_clk (TC_INTERFACE_ID + 0*3+0) ;  // clock the TC0 channel 0

  TcChannel * t = &(TC0->TC_CHANNEL)[0] ;    // pointer to TC0 registers for its channel 0
  t->TC_CCR = TC_CCR_CLKDIS ;  // disable internal clocking while setup regs
  t->TC_IDR = 0xFFFFFFFF ;     // disable interrupts
  t->TC_SR ;                   // read int status reg to clear pending
  t->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 |   // use TCLK1 (prescale by 2, = 42MHz)
              TC_CMR_WAVE |                  // waveform mode
              TC_CMR_WAVSEL_UP_RC |          // count-up PWM using RC as threshold
              TC_CMR_EEVT_XC0 |     // Set external events from XC0 (this setup TIOB as output)
              TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_CLEAR |
              TC_CMR_BCPB_CLEAR | TC_CMR_BCPC_CLEAR ;
 
  t->TC_RC =  875 ;     // counter resets on RC, so sets period in terms of 42MHz clock
  t->TC_RA =  440 ;     // roughly square wave
  t->TC_CMR = (t->TC_CMR & 0xFFF0FFFF) | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET ;  // set clear and set from RA and RC compares
 
  t->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG ;  // re-enable local clocking and switch to hardware trigger source.

  setup_pio_TIOA0 () ;  // drive Arduino pin 2 at 48kHz to bring clock out
  dac_setup () ;        // setup up DAC auto-triggered at 48kHz
}

void setup_pio_TIOA0 ()  // Configure Ard pin 2 as output from TC0 channel A (copy of trigger event)
{
  PIOB->PIO_PDR = PIO_PB25B_TIOA0 ;  // disable PIO control
  PIOB->PIO_IDR = PIO_PB25B_TIOA0 ;   // disable PIO interrupts
  PIOB->PIO_ABSR |= PIO_PB25B_TIOA0 ;  // switch to B peripheral
}


void dac_setup ()
{
  pmc_enable_periph_clk (DACC_INTERFACE_ID) ; // start clocking DAC
  DACC->DACC_CR = DACC_CR_SWRST ;  // reset DAC

  DACC->DACC_MR =
    DACC_MR_TRGEN_EN | DACC_MR_TRGSEL (1) |  // trigger 1 = TIO output of TC0
    (0 << DACC_MR_USER_SEL_Pos) |  // select channel 0
    DACC_MR_REFRESH (0x0F) |       // bit of a guess... I'm assuming refresh not needed at 48kHz
    (24 << DACC_MR_STARTUP_Pos) ;  // 24 = 1536 cycles which I think is in range 23..45us since DAC clock = 42MHz

  DACC->DACC_IDR = 0xFFFFFFFF ; // no interrupts
  DACC->DACC_CHER = DACC_CHER_CH0 << 0 ; // enable chan0
}

void dac_write (int val)
{
  DACC->DACC_CDR = val & 0xFFF ;
}



void adc_setup ()
{
  NVIC_EnableIRQ (ADC_IRQn) ;   // enable ADC interrupt vector
  ADC->ADC_IDR = 0xFFFFFFFF ;   // disable interrupts
  ADC->ADC_IER = 0x80 ;         // enable AD7 End-Of-Conv interrupt (Arduino pin A0)
  ADC->ADC_CHDR = 0xFFFF ;      // disable all channels
  ADC->ADC_CHER = 0x80 ;        // enable just A0
  ADC->ADC_CGR = 0x15555555 ;   // All gains set to x1
  ADC->ADC_COR = 0x00000000 ;   // All offsets off
 
  ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN ;  // 1 = trig source TIO from TC0
}

// Circular buffer, power of two.
#define BUFSIZE 0x400
#define BUFMASK 0x3FF
volatile int samples [BUFSIZE] ;
volatile int sptr = 0 ;
volatile int isr_count = 0 ;   // this was for debugging


#ifdef __cplusplus
extern "C"
{
#endif

void ADC_Handler (void)
{
  if (ADC->ADC_ISR & ADC_ISR_EOC7)   // ensure there was an End-of-Conversion and we read the ISR reg
  {
    int val = *(ADC->ADC_CDR+7) ;    // get conversion result
    samples [sptr] = val ;           // stick in circular buffer
    sptr = (sptr+1) & BUFMASK ;      // move pointer
    dac_write (0xFFF & ~val) ;       // copy inverted to DAC output FIFO
  }
  isr_count ++ ;
}

#ifdef __cplusplus
}
#endif


void loop()
{
}
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MarkT

Thought I'd add some 'scope shots - I removed the inversion and looked at input
v. output, there's clearly a 2 sample delay (probably because I fill the DAC FIFO
before starting up triggers to the DAC)



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greeTufty

This is pretty neat.

Is there more code, where you define constants, the ADC class etc, or does it all get defined in the depths of the Arduino source code?

MarkT

That's the complete sketch.  You need to look at the sources for libsam, all there
in the release, plain to see.
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bbrriiaann

MarkT,
Nice example, thanks.  I noticed that you did not disable ADC Write Protect Mode Register (ADC_WPMR) before changing the ADC parameters.  Is ADC_WPMR automatically disabled, do you know?

kbrown

I seem to have a fried DAC0. What do I need to change to make this work with DAC1 instead?

Cheers,
Kari
Cheers,
Kari

kbrown

Think I got it. Changed the dac_setup() to:

Code: [Select]

void dac_setup()
{
  pmc_enable_periph_clk(DACC_INTERFACE_ID);            // start clocking DAC
  DACC->DACC_CR = DACC_CR_SWRST;                       // reset DAC

  DACC->DACC_MR =
    DACC_MR_TRGEN_EN | DACC_MR_TRGSEL(1) |             // trigger 1 = TIO output of TC0
    //(0 << DACC_MR_USER_SEL_Pos) |                      // select channel 0
    (1 << DACC_MR_USER_SEL_Pos) |                      // select channel 1
    DACC_MR_REFRESH (0x0F) |                           // bit of a guess... I'm assuming refresh not needed at 48kHz
    (24 << DACC_MR_STARTUP_Pos);                       // 24 = 1536 cycles which I think is in range 23..45us since DAC clock = 42MHz

  DACC->DACC_IDR = 0xFFFFFFFF;                         // no interrupts
  //DACC->DACC_CHER = DACC_CHER_CH0 << 0;                // enable chan0
  DACC->DACC_CHER = DACC_CHER_CH1 << 0;                // enable chan1
}
Cheers,
Kari

rutkowsk14

#7
Mar 18, 2014, 03:11 am Last Edit: Mar 19, 2014, 04:21 pm by rutkowsk14 Reason: 1
Great thanks sooooo much. I was only using one ADC for my project so I used your code to trigger the ADCs for A0-A8, and averaged all of their values. Attached is a testing sketch I made for doing this! I later kept a running average using these values to get even more accuracy.

Code: [Select]
const int ADC_FREQ = 100000;
void setup()
{
 Serial.begin(115200);
 adc_setup () ;         // setup ADC
 
 pmc_enable_periph_clk (TC_INTERFACE_ID + 0*3+0) ;  // clock the TC0 channel 0

 TcChannel * t = &(TC0->TC_CHANNEL)[0] ;    // pointer to TC0 registers for its channel 0
 t->TC_CCR = TC_CCR_CLKDIS ;  // disable internal clocking while setup regs
 t->TC_IDR = 0xFFFFFFFF ;     // disable interrupts
 t->TC_SR ;                   // read int status reg to clear pending
 t->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 |   // use TCLK1 (prescale by 2, = 42MHz)
             TC_CMR_WAVE |                  // waveform mode
             TC_CMR_WAVSEL_UP_RC |          // count-up PWM using RC as threshold
             TC_CMR_EEVT_XC0 |     // Set external events from XC0 (this setup TIOB as output)
             TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_CLEAR |
             TC_CMR_BCPB_CLEAR | TC_CMR_BCPC_CLEAR ;
 
 t->TC_RC =  VARIANT_MCK/2/ADC_FREQ;     // counter resets on RC, so sets period in terms of 42MHz clock
 t->TC_RA =  VARIANT_MCK/2/ADC_FREQ/2 ;     // roughly square wave
 t->TC_CMR = (t->TC_CMR & 0xFFF0FFFF) | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET ;  // set clear and set from RA and RC compares
 
 t->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG ;  // re-enable local clocking and switch to hardware trigger source.

}

void adc_setup ()
{
 NVIC_EnableIRQ (ADC_IRQn) ;   // enable ADC interrupt vector
 ADC->ADC_IDR = 0xFFFFFFFF ;   // disable interrupts
 ADC->ADC_IER = 0x80 ;         // enable AD7 End-Of-Conv interrupt (Arduino pin A0)
 ADC->ADC_CHDR = 0xFFFF ;      // disable all channels
 ADC->ADC_CHER = 0xFF ;        // ch7:A0 ch6:A1 ch5:A2 ch4:A3 ch3:A4 ch2:A5 ch1:A6 ch0:A7
 ADC->ADC_CGR = 0x15555555 ;   // All gains set to x1
 ADC->ADC_COR = 0x00000000 ;   // All offsets off
 
 ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN ;  // 1 = trig source TIO from TC0
}


volatile int isr_count = 0 ;   // this was for debugging
volatile unsigned int last;


#ifdef __cplusplus
extern "C"
{
#endif

void ADC_Handler (void)
{
 //wait untill all 8 ADCs have finished thier converstion.
 while(!(((ADC->ADC_ISR & ADC_ISR_EOC7) && (ADC->ADC_ISR & ADC_ISR_EOC6) && (ADC->ADC_ISR & ADC_ISR_EOC5) && (ADC->ADC_ISR & ADC_ISR_EOC4)
  && (ADC->ADC_ISR & ADC_ISR_EOC3) && (ADC->ADC_ISR & ADC_ISR_EOC2) && (ADC->ADC_ISR & ADC_ISR_EOC1) && (ADC->ADC_ISR & ADC_ISR_EOC0))));
 
 //add all of adc values up and bit shit right three times to devide by 8
 //typcast to unsigned int so leading bits are shifted in as 0s
 int avj = ((unsigned int)(*(ADC->ADC_CDR+7)+*(ADC->ADC_CDR+6)+*(ADC->ADC_CDR+5)+*(ADC->ADC_CDR+4)+*(ADC->ADC_CDR+3)+*(ADC->ADC_CDR+2)+
 *(ADC->ADC_CDR+1)+*(ADC->ADC_CDR+0)) >>3;
 //Serial.println("  avj  "+ String(avj));
 isr_count ++;
}

#ifdef __cplusplus
}
#endif


void loop()
{
 }

}

limzz

I was pointed to this thread, and am wondering if this would be applicable to what I'm working on. I need to sample three analog inputs, each at about 34kHz, so I need ~100k samples/second(or as fast as I can get). I'm basically listening to three mics and trying to record the time the sound arrived at each, and analogRead isn't fast enough. I've starting messing with modifying this code and will continue to do so, but I think I need some help. I made some changes to rutkowsk14's code which I added below, it's an attempt to just read and spit out values, but clearly I'm missing something.

Code: [Select]

void adc_setup ()
{
  NVIC_EnableIRQ (ADC_IRQn) ;   // enable ADC interrupt vector
  ADC->ADC_IDR = 0xFFFFFFFF ;   // disable interrupts
  ADC->ADC_IER = 0x80 ;         // enable AD7 End-Of-Conv interrupt (Arduino pin A0)
  ADC->ADC_CHDR = 0xFFFF ;      // disable all channels
  ADC->ADC_CHER = 0xE0 ;        // enable A0, A1, A2?
  ADC->ADC_CGR = 0x15555555 ;   // All gains set to x1
  ADC->ADC_COR = 0x00000000 ;   // All offsets off
 
  ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN ;  // 1 = trig source TIO from TC0
}


volatile unsigned int last;


#ifdef __cplusplus
extern "C"
{
#endif

void ADC_Handler (void)
{
  //wait untill all 8 ADCs have finished thier converstion.
  while(!(((ADC->ADC_ISR & ADC_ISR_EOC7) && (ADC->ADC_ISR & ADC_ISR_EOC6) && (ADC->ADC_ISR & ADC_ISR_EOC5))));
 
  int val0 = *(ADC->ADC_CDR+7) ;
  int val1 = *(ADC->ADC_CDR+6) ;
  int val2 = *(ADC->ADC_CDR+5) ;

  Serial.println(val0);
  Serial.println(val1);
  Serial.println(val2);
  delay(1000);
}

#ifdef __cplusplus
}
#endif

ecousin

I don't really understand where you configure which clock is used and at which frequency.
Indeed you consider you're working at 84 MHz (or at the end 42 Mhz because of one prescaler set to 2), and the following calculations are made from that.
But the uC has the MainCLK, the PLLACLK, the SlowCLK, and it does not seem to be initialized.

Has someone the answer to these questions?
Thanks in advance.

MarkT


MarkT,
Nice example, thanks.  I noticed that you did not disable ADC Write Protect Mode Register (ADC_WPMR) before changing the ADC parameters.  Is ADC_WPMR automatically disabled, do you know?


All fields in all control registers default to zeroes at reset to my knowledge, including
the "enable write-protect" bits.
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MarkT


I don't really understand where you configure which clock is used and at which frequency.
Indeed you consider you're working at 84 MHz (or at the end 42 Mhz because of one prescaler set to 2), and the following calculations are made from that.
But the uC has the MainCLK, the PLLACLK, the SlowCLK, and it does not seem to be initialized.

Has someone the answer to these questions?
Thanks in advance.


All the main clocking is setup in SystemInit() in CMSIS, which for the SAM3X
processors defaults to 84MHz.  These code examples are run from setup() so the
system is already up and running.

See:
<distrib>/hardware/arduino/sam/system/CMSIS/Device/ATMEL/sam3xa/source/system_sam3xa.c
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Steve_Jacobs

I realize this is an old thread, but I'll take a shot at someone seeing this...

Thank you MarkT for your example.  I made use of it, and another example I found elsewhere, to develop my own sketch for the Due that copies an analog signal from input to output.  The goal is to set the sampling rate as high as possible, and eventually to explore digital filtering with this I/O as the starting point.

My sketch is below.  I have it working, and the sampling rate is a little over 400 kHz.  Sine wave in, sine wave out, no problem.  My question is...why does it work?  In particular, I borrowed from your sketch the line that enables analog input pin A0:

ADC->ADC_CHER = 0x00000001 << 7 ;

or, equivalently

ADC->ADC_CHER = 0x00000080 ;

What I'm wondering is, why doesn't this enable channel 7 instead of channel 0?  From the SAM3X datasheet, I expect that the correct syntax to enable channel 0 would be:

ADC->ADC_CHER = 0x00000001 ;

I am stumped.  Any help or redirection you can provide is greatly appreciated.

Thanks,
Steve

Steve_Jacobs

Nevermind...I figured it out.  Pin A0 is ADC channel 7.  In fact, for some reason pins A0 - A7 are adc channels AD7 - AD0, in reverse order.  This is shown on the left side of this pinout…

http://forum.arduino.cc/index.php?topic=132130.0

…although I have no idea why they would do this.

The lesson learned?  Start with the Due pinout next time...



MarkT

I know exactly why they did it that way, because it made the PCB layout simpler. 
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