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Topic: How is the state of a GPIO pin detected? (Read 1 time) previous topic - next topic

ignobilis

Hi,

I have become curious on how the state, HIGH or LOW, of a pin is detected or sensed. I can understand how a pin that is floating can be pulled HIGH or LOW with a pull up or pull down resistor, but what mechanism is used inside the microcontroller to determine whether it is in fact HIGH or LOW? I think I am correct in saying that a pin that has been pulled HIGH or LOW is not part of a completed circuit, so is a circuit momentarily created to detect its state, or am I missing something altogether?

I have tried searching for an answer, but been unsuccessful so far, so even if someone could just point me in a direction to search for, I would be grateful.

Thanks in advance.

Ignobilis

Grumpy_Mike

A HIGH and LOW are simply a voltage with in the case of TTL High being anything over 3.7V and LOW being anything under 0.7V.

You make electronic circuits that take combinations of these voltages and make logic functions. The simplest being a NOT a circuit whose output is NOT the logic level as the input. The next circuit is an OR gate where the output is HIGH if one OR the other of two inputs are HIGH.

That is it.

All other logic functions are derived from those two concepts. All memory, counters, latches, everything in digital electronics is a combination of those two functions.

JChristensen

For practical purposes, a digital input can be thought to be the same as the input to any other logic gate but this is CMOS technology so the input impedance is very high and practically no current is drawn by the input.

In reality the situation is more complex, due to the multiple roles that can be assigned to a pin:

ignobilis

Thanks for the responses, but I think I am not expressing myself clearly.

I understand that HIGH means "above a certain +ve voltage" and that LOW means "below a certain +ve voltage (near 0)", but I am curious about how the micro controller knows that a particular pin has a voltage of, say +4.5, or +0.2, attached to it.

When I use an output pin, I can easily detect whether the pin is HIGH or LOW, by connecting a component that acts as an indicator to it (e.g. an LED), or even by measuring the voltage with a multimeter. How does the IC do that when the situation is reversed and it has to determine whether the pin is HIGH or LOW, in other words, how does the IC detect that the pin is connected to  a certain voltage range?

I hope that makes sense.

cmiyc


in other words, how does the IC detect that the pin is connected to  a certain voltage range?

Look at the diagram posted by Jack.  It's a representation of what is behind a pin.,

From the left box that says "Pin" moving to the right, you first see the pull-up resistor and then a path "down".

The path goes through a mux (I think?) and then into diode symbol which is known as a Schmitt trigger.  That circuit is a comparator circuit that will output only two voltages while accept a range of input voltages.  This is where the ranges of "high" and "low" come in, which Mike provided. 

The rest of the circuit is used to "clock in" the voltage provided by the schmitt trigger.

You can find out more about them here:  http://en.wikipedia.org/wiki/Schmitt_trigger
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ignobilis

Thanks James and everyone, I've got it now! Fascinating stuff!

JChristensen


Thanks James and everyone, I've got it now! Fascinating stuff!


Indeed! :D  That Wikipedia article I linked shows some simple CMOS logic gate implementations, e.g.


MarkT

The actual circuit in the ATmega microcontrollers is a little more complex as
it has a small amount of hysteresis.  The CMOS inverter is a high-gain voltage
amplifier so for most input voltages the output is at 0V or at Vcc.  Somewhere
in the middle it switches over, precisely where is not critical.

The input circuit isn't designed to measure certain voltages, the voltage specs for
the input signals are a worst-case specification for all the chips made at all
valid temperatures.  Typical devices detect LOW below about 2.5V and HIGH above
about 2.5V roughly, but you should never assume this voltage.

Take the values in the datasheet as guarantees of worst case performance,
below 1.5V is LOW, above 3.0V is high (for 5V supply) - if I remember correctly.

Also note that the CMOS inverter conducts current when the input is somewhere in
the middle, since both FETs are on - it is usually case the input voltage is either
0V or 5V or switching rapidly between these values, so that the power dissipated is
small on average.  The hysteresis added to the actual input circuits is partly there
to prevent this.
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ignobilis

Massimo Banzi, in his TED Talk on Arduino, thanked the Arduino community for being the best in the world. He was right. It is a privilege to have access to such knowledgeable people who are more than happy to share their expertise.

Thanks, guys!

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