Locating the XTAL crystal under a DIP microcontroller?

Hi,

Just a general question - I mount the crystal adjacent to the XTAL legs and close to the DIP package of the ATmega. I realise that's purely out of tradition rather than knowledge, granted every Arduino I see does that.

Since the oscillator is a source of EMR I had presumed it is somehow better placed there for reduced EMR interference with the ATmega/ATtiny. Again that's a presumption only. I couldn't see anything in the ATmega328 datasheet to confirm this.

So, my question is if the PCB had a ground plane flood could we locate the crystal and its capacitors under the board, between the DIP package's legs ?

Or is there some other factor at play here that makes placement elsewhere inferior?

Cheers!
Geoff

between the DIP package's legs

Yes

Read this, see the part on crystal.

Here's an example of a board with the crystal under the chip.
http://www.crossroadsfencing.com/BobuinoRev17/

AtmelAVR042 AVR Design Considerations.pdf (236 KB)

CrossRoads:
Read this, see the part on crystal.

Thanks - that makes it especially clear. I'm glad I asked.

Finally, the importance of the physical location of the resonator in relation to the AVR should be stressed. Always place the resonator as close to the AVR as possible and shield the resonator by surrounding it with a ground plane

The parts about protecting SPI lines with resistors from the ISP pins, and putting a cap on the reset line I hadn't seen before either.

Cheers!
Geoff

strykeroz:
The parts about protecting SPI lines with resistors from the ISP pins...

Works great when whatever is connected to the processor cannot be made high-impedance and the programmer does not have series resistors. I used 51k resistors on a board with an ATtiny84 processor and a TLC5940 LED driver. The LEDs go crazy while programming but that is a small price to pay for in-system programming!

Thanks for the tip on the resistor value.

Can you point me to an example where the slaves are ATtiny too? I have a project where I was just going to leave the ISP header off because of multiple ATtiny SPI slaves but potentially I could switch the SS to choose which uC to program with a dip switch or simple jumper, but these protective resistors would then be in the path of the ISP too presumably. Is that a bad thing?

Geoff

but these protective resistors would then be in the path of the ISP too presumably. Is that a bad thing?

The programming pins have the resistors in series with the SPI bus, the SPI pins go directly to their destination/interface (as in data in the sheet)

strykeroz:
Thanks for the tip on the resistor value.

It is based on the maximum source/sink for TLC5940 signal pins.

Can you point me to an example where the slaves are ATtiny too?

I cannot. But, if you post a schematic, I suspect you will be offered some opinions.

I have a project where I was just going to leave the ISP header off because of multiple ATtiny SPI slaves but potentially I could switch the SS to choose which uC to program with a dip switch or simple jumper...

Switching SCK will probably work better.

...but these protective resistors would then be in the path of the ISP too presumably. Is that a bad thing?

No. Most commercial programmers include series resistors. 1k seems to be a popular value.

You are of course correct. And thanks for being diplomatic with my half-formed thought above. There's no SS on the ISP header to switch so that may have presented a challenge :wink:

This thread has been very illuminating - thanks guys!
Geoff

Do I gather that what you meant to say was five, one k resistors?

Three 1k ohm resistors. One for MOSI. One for MISO. One for SCK.

I have not run across a programmer that includes series resistors on VCC, GND, or RESET / SS.

5.1k series resistors on the SPI lines. Sorry about the mistake.

The TLC5940 has a very low maximum current for the signal lines. The resistors ensure that limit is never exceeded.

Hi


If you can't see above - link to image at dropbox

In the project I mentioned above there's an ATmega328 which acts as SPI master, with 6x ATTiny84 slaves. The net SPI-SCK leads to the ATmega328 pin 19 (Arduino D13) and SPI-SCK-0 through -5 are pin 9 on each of the 6 slaves. My thoughts were 3 rows of 7 pins, with 7 jumpers either in the left (run) or right (program) position which hooks up SCK with the uC to be programmed. MISO & MOSI are connected to all 7 uCs.

At least this would mean for the cost of some headers and 7 jumpers I don't have to keep popping ICs in and out of sockets to program, and leaves the door open for surface mount 84's with ISP updatable firmware down the track. I'm open to suggestions though, as this still feels like there must be a less clunky answer.

Thoughts?
Geoff