Hi, that is very little information.
Can you show a screendump of a logic analyzer en give a link to how the STM32 in Slave mode behaves ?
When the Master requests data from the Slave, the Slave does a ACK to its I2C address. After that, the Master gives the CLK signal and the ACK after each read databyte.
That ACK from the Master is to tell the Slave that it should prepare a new databyte.
After the last databyte is read, the Master does not give a ACK, but a STOP.
That is according to the I2C standard. You should not change that.