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Topic: Due reset pin - odd circuit choice? (Read 911 times) previous topic - next topic

weird_dave

I'm going over the Due circuit diagram as I intend to make my own PCB using the smaller BGA part and making some other changes (native USB only for example).
I'm looking at the reset circuit and I don't see any sense in C20 being connected to +3v3 instead of GND, it seems counter intuitive since this will briefly draw a large current from the 3v3 when the switch is pressed as opposed to just shorting the cap out if it was connected to GND instead (same pain for the cap and switch but the 3v3 won't notice).
I notice that the datasheet suggests putting the cap to VDDBU for "noisy environments", but no deeper explanation that I could see.
Google images shows a preference for putting the cap in parallel with the switch, not in series with it: (some also sensibly put a current limiting resistor in too)
https://www.google.co.uk/search?q=RC+on+reset+pin&espv=2&biw=1280&bih=963&tbm=isch&imgil=oHOGm9TUsK1DkM%253A%253B7pkzmAXK9TEs-M%253Bhttp%25253A%25252F%25252Fwww.circuitstoday.com%25252F8051-microcontroller&source=iu&pf=m&fir=oHOGm9TUsK1DkM%253A%252C7pkzmAXK9TEs-M%252C_&usg=__7FFvjmqOHFbgtVuyWzzppNaqQvg%3D&ved=0ahUKEwihxrDA8NrRAhXJKcAKHZOqDecQyjcIKA&ei=elWHWKGhHcnTgAaT1ba4Dg#imgrc=_
My experience of other micros is the same, so why would this micro buck the trend?

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