westfw:
I'd be shocked if there isn't some Chinese product that would work. STC, perhaps?
nom, nom, nom... GitHub - grigorig/stcgal: Open Source STC MCU ISP flash tool hmmm never heard of STC before... oh look! they're used in those ubiquitous PL2303-based things, ha, funny. doh, an app note for an STC15 actually uses... an SOP-8 PL2303 to do USB-to-UART, doh!
Not that I know of. It's a lot of pushing tracks around "a little bit", ripping up and re-routing a small subset of them at a time, and stuff like that, trying to make things look "even" and pretty without changing the electrical at all. Some people hate it...
oh that! yeah i love doing little minor track-thingies. means i get to do a careful thorough review at the same time.
yeah knock yourself out, let me just do a make upload, i have about 2 other boards i should be focussing on (and a prototype to assemble). one thing, if you look closely at the ADC tracks some of them come in on BOTTOM, some on TOP, all into the same area (very very tight). they were parallel to each other in a big group. what i've done is deliberately pushed them 45, then 90, then 45, in opposite directions so as to get as much of the sets of tracks at right-angles to each other.
i'm keeping "Stop" layer switched on, it shows a keepout area around the octagonal VIAs, which i've found very handy for all this manual checking of clearances.
I2C is along the top between pins 20/21 to the r3 equivalents, it's hard against the board edge (no GND plane), if you think of a better way to do that, feel free.
if you want a challenge tidying up the right-hand connector area to get some GND in between the pins, i discovered that you can actually fit a signal VIA or a GND via and still juuuust about get a track round it on two sides, by putting the VIA near-hard up symmetrically against two of the 2.54mm pins. you can only get 1 track in between any 2 given 2.54mm pins (tried getting 2... even when setting grid to 0.625mil.. doesn't work) but you can have one track come in East, go out North whilst another track comes in West and goes out South... you just can't get a VIA in the middle as well if you do that. but, TOP coming in North going out West, and BOTTOM coming in South going out West you can get a VIA in, jammed up against the East side. never used octagonal pin shapes before: quite like them now.
the other area that's a little dicey is just above the 32.768kHz XTAL, running from the top-left corner of the MCU to round where the words TX, RX and 1.0 are. there are tracks running horizontally parallel to each other, not too happy about them.
looking at it now, i think the set of VIAs just above C1 and C2 could all move to the left of C1 and C2, above the MicroSD card, then the tracks PE1, PE0 and PD7 currently running through the words "V1.0 TX RX" could all also be shifted down, running 45 degrees below the word "RX", which would make them at 90 degrees to the BOTTOM tracks on the other layer.
i figured also get an extra couple of VIAs in round the 32.768khz XTAL whilst at it... anyway do you want to tackle that? you're more than welcome. i'm not going to be sending this off for prototyping for at least... a week (or until i'm happy with it).