Go Down

Topic: PID identifiers of PMC Peripheral Clock registers (Read 758 times) previous topic - next topic

redou95100

Hello,

i'm reading the samx3 's datasheet, and i want to know something. i read on page 563 : " To get PIDx, refer to identifiers as defined in the section "Peripheral Identifiers" in the product datasheet." about the PMC Peripheral Clock Status Register 0. Where can i find the section "Peripheral Identifiers"?

an other thing i don't understand is why they are 2 PMC  Peripheral Clock registers, because they are 3 timers and each one have 3 channels. So if i want to enable the channel 2 of the TC2, i use PMC_PCER0 or PMC_PCER1 ?

thanks

ard_newbie

#1
May 17, 2018, 05:50 pm Last Edit: May 17, 2018, 06:22 pm by ard_newbie
The timer Counter naming may be confusing:

Timer Counter 0 channel 0 is TC0
Timer Counter 0 Channel 1 is TC1
...
Timer Counter 2 Channel 2 is TC8

To select the clock for a given TCx, refer to PID page 38 of Sam3x datasheet, I.e.:

PMC->PMC_PCER0 for TCx PID 27(TC0) to 31(TC4) and PMC->PMC_PCER1 for TCx PID 32(TC5) to 35(TC8).


An example sketch with TC8:

Code: [Select]

/******************************************************************/
/*       Timer Counter 2 Channel 2, namely TC8, 1 MHz frequency   */
/******************************************************************/
void setup() {
 
  pinMode(LED_BUILTIN, OUTPUT);
  tc_setup();

}


void loop() {

}

void tc_setup() {

  PMC->PMC_PCER1 |= PMC_PCER1_PID35;                      // TC8 power ON : Timer Counter 2 channel 2 IS TC8 - see page 38

  PIOD->PIO_PDR |= PIO_PDR_P7;                            // Set the pin to the peripheral
  PIOD->PIO_ABSR |= PIO_PD7B_TIOA8;                       // Peripheral type B

  TC2->TC_CHANNEL[2].TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1  // MCK/2 = 42 M Hz, clk on rising edge
                              | TC_CMR_WAVE               // Waveform mode
                              | TC_CMR_WAVSEL_UP_RC       // UP mode with automatic trigger on RC Compare
                              | TC_CMR_ACPA_CLEAR         // Clear TIOA2 on RA compare match
                              | TC_CMR_ACPC_SET;          // Set TIOA2 on RC compare match


  TC2->TC_CHANNEL[2].TC_RC = 42;  //<*********************  Frequency = (Mck/2)/TC_RC  Hz
  TC2->TC_CHANNEL[2].TC_RA = 41;  //<********************   Any Duty cycle in between 1 and TC_RC


  TC2->TC_CHANNEL[2].TC_IER = TC_IER_CPAS;
  NVIC_EnableIRQ(TC8_IRQn);
  TC2->TC_CHANNEL[2].TC_CCR = TC_CCR_SWTRG | TC_CCR_CLKEN; // Software trigger TC2 counter and enable
}

void TC8_Handler() {

  static uint32_t Count;

  TC2->TC_CHANNEL[2].TC_SR;
if (Count++ == 1000000) {
  Count = 0;
  PIOB->PIO_ODSR ^= PIO_ODSR_P27;
}
}


redou95100


Go Up