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Topic: FPGA Block Wishlist (Read 698 times) previous topic - next topic

mmalluck

I've started brainstorming a number of projects or libraries that would be interesting to create using the FPGA, in no particular order, please feel free to add anything else to the list:

Multichannel Rotatory / Linear Variable Differential Transducer signal generation and decoding.
Multichannel PID Controller.
FFT with HDMI visuals.
Software Defined Radio. Both Tx and Rx.
Realtime ARINC 429 decoding / encoding / filtering / manipulation (I'm in aviation)
Realtime Ethernet decoding / encoding / filtering / manipulation
O'scope / Lab instrument (mentioned here)
DSP (mentioned here)
Image detection / QR decoding (in work / already works)
HW Emulation of legacy processors (C64, Gameboy, NES, SNES, etc.) and / or particular hardware specs (SID chip emulation)


loopmasta

Great list. What about Machine Learning for FPGAs.

a2retro

Hi Dario, Is there any plans for a OpenVino library for the Vidor? Seems like a natural fit.

tomtom2770

Also some more or less simple image operations would be great to have similar to OpenCV maybe.

DarioPennisi

hi guys,
thanks for the input. the resources and capabilities ew have on Vidor are a bit limited for serious vision applications so don't expect to do on it openCV stuff, not at least the fanciest things at least.
one of the main limitations is memory bandwidth (to keep costs low we just have a SDRAM) so we can go very fast if we can process on line but not so much if we have to store frames in memory.
you will notice that the VidorGraphics image actually only uses 16 bits per pixel for this reason even if image from camera can be up to 30 bits per pixel.
just to do some math, we have 100 MHz/16 bit bandwidth on SDRAM; if we consider a pixel made of 16 bits then we have 100 MPixel/sec gross bandwidth. VGA output requires 640*480*60 =about 18.5 MPixel/Sec. if we need to write it, read it back and also read back another layer for the OSD we already consumed more than half the bandwidth, then we need to consider some bandwidth to write OSD and some extra bandwidth for access overhead (typically up to 20%) so you can easily see where i'm going.

in any case operations such as edge detection (we do that in QR finder), filtering, and eventually also downscaling can be done pretty much on the fly and if we don't need to have OSD (or we want to have a lower resolution one) then we can easily go for 24 bits per pixel all the way.

in any case please try to be a bit more specific on the cores you would like to see and most importantly for which application so that we can try to put our effort where more people see value.

tomtom2770

#5
Aug 13, 2018, 04:59 pm Last Edit: Aug 13, 2018, 04:59 pm by tomtom2770
Thanks for your answer. For some friends and me simple image operations without OSD (assuming it means on screen display) would already be very interesting and probably very helpful to extend the basic libraries.
Generally we would be interested in Edge Detection, Down-sampling and maybe a Sobel filter. But considering the last one I am not sure whether this is even possible on the given hardware.

Can I ask which method you used for Edge detection in the QR ip block?

DarioPennisi

hi tomtom,
actually qr detection is done using a sobel filter and then looking ad distances between edges. we look for a sequence of black/white/black/whitewhitewhite/black/white/black so that each period has more or less the same width. color is detected by just looking at the edge direction.
your suggestion is indeed interesting. we can specialize the fpga for image processing, removing some stuff and adding some other..
let's try to elaborate on this and see what else we need to do something useful. i guess it's not just about IP blocks but also about software being run on the soft core, which has much faster access to SDRAM than SAMD21.

tomtom2770

#7
Aug 14, 2018, 02:51 pm Last Edit: Aug 14, 2018, 04:05 pm by tomtom2770
Hi Dario,

this is great news and I would be happy to further develop this. Once your toolchain for developing IP blocks is ready to be released I could start playing around with the current libraries.
 You will probably need some kind of container which is able to store different formats and which can easily be passed between hardware and software.

What do you suggest to do next (my experience in FPGA development is rather small)?




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