[WORKFLOW RELEASE] Vidor sample projects are opensource!

[jokejustjoke]

If I remember right boot loader need some data in .fpga_bitstream section that is outside of SAMD flash area. If it's empty it won't access to FLASH connected to FPGA.

Is there any part of the code that confirms this .fpga_bitstream requirement? I don't question your claim/memory, I just want to have something I can look at and answer questions by myself.

[Limba]

These were in linker script "flash_with_bootloader.ld"

MEMORY
{
  FLASH_FPGA (r) : ORIGIN = 0x00040000, LENGTH = 0x00200000
  FLASH (rx) : ORIGIN = 0x00000000+0x2000, LENGTH = 0x00040000-0x2000 /* First 8KB used by bootloader */
  RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
}


.fpga_bitstream_section :
{
   KEEP(*(.fpga_bitstream_signature))
   KEEP(*(.fpga_bitstream))
} > FLASH_FPGA

Didn't find bootleader sources. This atleas put FPGA image outside of SAMD flash area so bootloader should detect this and write it to FPGA FLASH.

[famo]

My design on FPGA works and now I'd like to add the WiFi NINA.

I have Quartus with all licenses.

Trying to compile with Quartus the FPGA project I can find in MKRVIDOR4000_peripherals folder,
it seems the file
  ../build/MKRVIDOR4000_peripherals_lite_sys/synthesis/MKRVIDOR4000_peripherals_lite_sys.qip
is missing, the "build" folder itself is missing.

It is true or is it somewhere?

If it is missing, what to do to allow the processor to use the WiFi in my own FPGA?

Thanks.