FPGA.pinMode(33, OUTPUT); FPGA.digitalWrite(33, HIGH); // The same pin can be read by the SAMD processor pinMode(A0, INPUT); Serial.print("Pin A0 is "); Serial.println(digitalRead(A0) == LOW ? "LOW" : "HIGH"); FPGA.digitalWrite(33, LOW); Serial.print("Pin A0 is "); Serial.println(digitalRead(A0) == LOW ? "LOW" : "HIGH");
Hi,Fpga pinout can be derived from schematic or from constraints file here: https://github.com/vidor-libraries/VidorBitstream/blob/release/constraints/MKRVIDOR4000/vidor_s_pins.qsfPin assignment for libraries should have been published but is for some reason still a company secret... Anyway, since it's Christmas.. please have a look here: https://docs.google.com/spreadsheets/d/1oAL1Iz39eCHi0IVyMiTRyekmzJg5TgeyO5t0fN6Vl4U/edit?usp=drivesdkHappy hacking!