Argh. I was tricked because WGM10 and WGM11 are located in TCCR1A. Obviously I should have looked much closer at where the bits are located instead of what the bits mean. I never expected these closely related bits to be in two different registers. Now it runs @1200,04088 Hz which is 34ppm of the mark --> consistent with what I would expect.

// Set OCR1A for running at 1200 Hz (because we have 20 discrete phases per period and want to have 60 Hz)

OCR1A = (F_CPU / (60*20)) - 1; // I think you missed a division by 2...

This is another pitfall in the datasheet. I did not miss a division by 2. The formula in the datasheet gives the frequency for PWM. However it does not mention why the 2 enters the formula and why this formula does not apply to CTC interrupt frequency. The point is that for PWM the counter will run twice to make up one period. However for CTC the interrupts are triggered whenever the counter hits the compare value. Thus no division by 2.

Obviously you find everything in the datasheet but sometimes the contents are not that obvious.

Thanks a lot for your help. Now everything works as desired.