SPI EEPROM interfacing

The LVC125 has four gates, each with an input and an output, and an ENable pin that is active low. If the /EN pin is low, the output follows the input, but if /EN is high, the output is Off (high impedance, tristate).

If there are multiple devices using SPI, all of their MISO pins are connected together, but the only one that's supposed to be driving the line is the device with an active /CS pin. All the others are supposed to go tristate. However, most of the microSD modules available now just tie all four /EN pins to ground, which is wrong. The /EN pin for MISO should be tied to /CS so the gate will be active only when that device is selected.

So I'm just saying if you ever want to build your own (faster) level shifter, keep that MISO issue in mind so your memory device will play well with others.