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Topic: [SOLVED] arduino_generic_quad_spi_controller2 component not found (Read 913 times) previous topic - next topic


Hi everyone!

I'm trying to build the MKRVIDOR4000_template_mbox_lite project but, while generating the HDL from MKRVIDOR4000_template_mbox_lite_sys.qsys file, I get the following error:

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Component arduino_generic_quad_spi_controller2 18.1 not found or could not be instiantiated

The arduino_generic_quad_spi_controller2 IP is visible from the Quartus Platform Designer, but when I try to add it in MKRVIDOR4000_template_mbox_sys.qsys, Quartus says:

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Error: An instance of Arduino Generic QUAD SPI controller II Intel FPGA IP could not be created.
The component had an unexpected internal error.

Searching for this problem in the MKRVIDOR4000 forum, I saw that the solution is to correctly patch Quartus with the file "apply_quartus_patches.sh" from the VidorBitstream-release archive, so I ran it from Linux terminal (I'm using Ubuntu 20.04), with Nios 2 Command Shell opened

(I would like to post the log but it exceeds the characters' maximum allowed length, if it is allowed I would post it in 2 following messages)

Between the patching lines, i noticed that lots of hunks failed but I can't figure out why.

I also tried to add the Generic QUAD SPI Controller II Intel FPGA IP, with configuration device type N25Q016A13ESF40, connecting the same sources to the same ports as seen in the qspi (arduino_generic_quad_spi_controller2) module, but I get the error:

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Error: MKRVIDOR4000_template_mbox_lite_sys.nios2_gen2_0.data_master: generic_quad_spi_controller2_0.avl_csr (0x0..0x3f) overlaps sdram.s1 (0x0..0x7fffff)

Is there a way to fix this? I hope I've been exhaustive!  :D



It seems QSPI IP don't have base address configured or it has lost it's base address.

It seems you had saved project qsys file when it was broken.
qspi.avl_csr 0x00a0 4cc0 - 0x00a0 4cff
qspi.avl_mem 0x0080 0000-0x009f ffff

Maybe easiest is to recover qsys file from zip/gz

removed address was from tiny spi.


Hi Limba and thank you very much for replying.

I tried to see how to insert the addresses you gave me in qspi.avl_csr and qspi.avl_mem, but this is not possible since Platform Designer doesn't see qspi IP as a library, so I couldn't insert them there. Instead, I managed to insert the addresses in the _csr and _mem ports of Generic QUAD SPI Controller II Intel FPGA IP, solving the overlapping problem.

So I generated the HDL successfully and included the associated .qip file in the project, however I cannot figure out how to instantiate it in MKRVIDOR4000_template_mbox_top.v file:

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MKRVIDOR4000_template_mbox_lite_sys u0(
.clk_clk                (wMEM_CLK),               //      clk.clk
.reset_reset_n          (rRESETCNT[5]), // reset.reset_n
.clk_0_clk              (wFLASH_CLK),
.qspi_dclk              (wQSPI_CLK),       //      qspi.dclk
.qspi_ncs               (wQSPI_NCS),        //          .ncs
.qspi_oe                (wQSPI_OE),         //          .oe
.qspi_dataout           (wQSPI_DATAOUT),    //          .dataout
.qspi_dataoe            (wQSPI_DATAOE),     //          .dataoe
.qspi_datain            ({oFLASH_HOLD, oFLASH_WP, iFLASH_MISO, oFLASH_MOSI}),      //          .datain

                .mb_rq                  (iSAM_INT),      //        iMST_RQ
.mb_ak                  (oSAM_INT),      //        oMST_AK
                .sam_pwm_pwm    (wSAM_OUT1)

This is the qspi-dedicated part in the original instantiation of the MKRVIDOR4000_template_mbox_lite_sys IP block.

Regarding the Generic QUAD SPI Controller II Intel FPGA IP, on the platform designer I see that I have 3 wires:

Is there a way to instantiate them in order to replace all the qspi wires?


Problem solved!

I passed to Windows and downgraded Quartus to 18.1, it seems it was a compatibility problem.

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