Version 2.1.2 of library GxTFT is available.
- added support for my Nucleo-144 proto board with FSMC/FMC TFT connector
- supported by class GxIO_STM32Nucleo144_P16 using bit-bashing for F767ZI and F746ZG
- tested with 3.2" ILI9341 on F767ZI
- FSMC/FMC version will follow, expected to be only slightly faster
My first attempts with FSMC/FMC failed. I will need to take a closer look at the STM32F7 docs.
I have opened an issue about the missing pin #defines for Nucleo-144 F767ZI.
I had to use a workaround to create a long enough write pulse with the bit-bashing verrsion:
while (num)
{
// this doesn't work. reason unknown. optimized by compiler?
//GPIOD->BSRR = (0x1 << (5 + 16)); // PD5 WR low
//GPIOD->BSRR = (0x1 << (5 + 16)); // PD5 WR low
//GPIOD->BSRR = (0x1 << (5 + 16)); // PD5 WR low
//GPIOD->BSRR = (0x1 << (5 + 16)); // PD5 WR low
//GPIOD->BSRR = (0x1 << 5); // PD5 WR high
// this does work. compiler can't optimize.
volatile static uint32_t ttt = 1;
if (ttt++) GPIOD->BSRR = (0x1 << (5 + 16)); // PD5 WR low
if (ttt++) GPIOD->BSRR = (0x1 << (5 + 16)); // PD5 WR low
// if (ttt++) GPIOD->BSRR = (0x1 << (5 + 16)); // PD5 WR low
// if (ttt++) GPIOD->BSRR = (0x1 << (5 + 16)); // PD5 WR low
// if (ttt++) GPIOD->BSRR = (0x1 << (5 + 16)); // PD5 WR low
ttt = 1; // don't miss once in 2**32
GPIOD->BSRR = (0x1 << 5); // PD5 WR high
// this would also work, but slower
//digitalWrite(_wr, LOW);
//digitalWrite(_wr, HIGH);
num--;
}
Jean-Marc