23k256 SRAM please share your experience with 3.3V I/O interfacing.

Is there anybody on this board with an experience interfacing with 23K256 SRAM? Or any other 3.3V I/O device.

I got the software working but the data read do not match the data written. I am modifying the hardware for 3.3V I/O using diodes.

Cheers Vaclav

What Arduino are you using? Post your schematics!

I am modifying the hardware for 3.3V I/O using diodes.

Bad idea.

Use open collector buffers. like the 74LS07.

I use this EEPROM chip in this project:-

http://vimeo.com/38466551

Mike,
I just soldered few diodes and ready to wire it up, but I will look if I have any of the 07 chips or any open collector stuff first. I may…
Could you comment of this , I am currently pushing the chip limits using standard 5V I/O and I do suspect the interface may be the issue.
I have not look at the SPI clock speed settings in software, but I put some delays between write and read cycles.
I am using SpiRAM - SpiRam.read_stream / write_stream. So far no real issue with the code.

Cheers Vaclav

Arduino Audio Loopback
Available memory 978 75
Write 12345678901234567890 The quick brown fox jumps over the lazy dog 12345678
Read
12344778800116637<80 Thd prlam aqoso go| ivnpq osfq vhf n}x doc 0112637<80 Write 12345678901234567890 The quick brown fox jumps over the lazy dog 12345678 Read 12344778800116637<80 Thd prlam aqoso go| ivnpq osfq vhf n}x doc 0112637<80
Write 12345678901234567890 The quick brown fox jumps over the lazy dog 12345678
Read

pylon: What Arduino are you using? Post your schematics!

Please read OP, thank you.

If you ask nicely I MAY send you copy of my work log. There is no schematic available for public to critique. Sorry.

Cheers Vaclav

I have not look at the SPI clock speed settings in software, but I put some delays between write and read cycles. I am using SpiRAM - SpiRam.read_stream / write_stream. So far no real issue with the code.

Gaps between the streams are not going to cut it. You need to change the clock. You also need to show where the diodes are. If they are just in seriese with the signal lines then how do you get a logic zero on the lines?

Is spiRAM a libary, if so why use it. It is almost certainly not the same protocol.

Sorry that link to my project does not seem to be showing up.

Grumpy_Mike:

I have not look at the SPI clock speed settings in software, but I put some delays between write and read cycles. I am using SpiRAM - SpiRam.read_stream / write_stream. So far no real issue with the code.

Gaps between the streams are not going to cut it. You need to change the clock. You also need to show where the diodes are. If they are just in seriese with the signal lines then how do you get a logic zero on the lines?

Is spiRAM a libary, if so why use it. It is almost certainly not the same protocol.

Sorry that link to my project does not seem to be showing up.

Mike, guess what, after I buttoned things up ( two small signal diodes in series) I realized that I need some pull downs to get the 0 level to the inputs.

Is spiRAM a libary, if so why use it. It is almost certainly not the same protocol.

I do not understand your question. SpiRAM in SPI based, but I have not looked in it in details, especially as far as the SCK. But it can be set max to system clock / 4 and that should be OK for the 20 MHz chip anyway. Interesting;y - the SCK looks great on the scope, but the MOSI is pretty noisy. ( That may be an issue )

PS I found CD7407 but cannot find any data on it, I guess a trip to local surplus store is due. Cannot wait to rummage thru hundreds of IC's. Joy. Cheers Vaclav

Mike, have you found any use for /HOLD feature in the chip?

Here is an article about 3.3 V interfacing by Microchip folks.

http://ww1.microchip.com/downloads/en/DeviceDoc/chapter%208.pdf

ave you found any use for /HOLD feature in the chip?

Yes.

If you have more than one thing on the SPI bus like an D/A you can address the SRAM to be in the sequential output mode where you give it an address and subsequent reads give the next address. If you take the chip enable high so you can talk to the D/A then this will terminate the sequential read and you have to put the address into the SRAM again. That is 3 accesses before you can get to the data. The hold line stops the device from responding to SPI bus activity without exiting the current mode.

Here is an article about 3.3 V interfacing by Microchip folks.

Yes seen that thanks, I some times post it for advice.

It looks as using diodes to drop the 5V to 3.3V requires experimenting with the pull down resistor.
I have a nice clean trace on CS signal using 470 kOhms and lousy looking one on SCK using 470 Ohms. .(IMHO to low~ 7 mA - ) I tried 100 kOhms and it just did not fly.
I think I’ll go back to direct interface with 5V

I think I'll go back to direct interface with 5V

With a series 510R and a 1K pull down?