24 volt H-Bridge Problem - top dormant FET is being turned on by motor voltage s

Using Arduino General Electronics
#1

I have an h bridge using P type fets on the top and N type fets on the bottom. Fets are STP80pf55 and STP80nf55. I'm using a MC33035 bridge controller in a Brushed Motor configuration. Top fets have a voltage divider resistor arrangement on the gate to manage gate voltages. Both resistors are 1K limiting gate "on" voltage to half of the 24v supply. The problem is that when the bottom fet is permitted to switch (PWM @ 10% duty cycle) the top fet on the same side of the bridge is turning partially on in sync with the bottom fet. The voltage measured from ground to the bottom of the motor is a nice clean PWM signal pulsing down from 24v to 0v when the bottom fet is "on" and pulsing back up to 24v when the bottom fet is "off" as expected. However the gate on the top fet on that side of the bridge, this being the one that is supposed to be "off", has a negative going pulse from 24v down to about 20v that is in perfect sync with the motor voltage as measured from ground. This 4 volt difference between source and gate is enough to reach gate threshold and begin to turn on the fet. It appears that the motor voltage switching on the side of the bridge where the bottom fet is active is influencing the gate voltage of the top fet on that same side. I'm at a loss to understand this.
I have checked everything I know how on my PCB and it all looks good. The board is 4 layer with planes and layout is tight. No long runs between controller and fets. No unwanted noise that I can see anywhere. A previous version of this board made to run at 12v worked fine but now at 24v it's not. I compared the signals on the 12v board and the unwanted signal is there on the gate of the same fet but it is small enough that it does not reach gate threshold. The gate signal is not a blip, spike or noise but a 4v square pulse that is in sync with the signal on the drain and with matching duty cycle. I can switch motor drive direction and produce the same results on the other side of the bridge and do this on either board so I don't think any of the fets are damaged.
Are parasitics to blame for this and if so how is this typically handled?

Thanks in advance for any help.
skip.ele

#2

You know, a schematic would really help.

If you suspect capacative or inductive pickup then the PCB layout will be helpful although looking at a picture of 4 layers is difficult.

I suspect you have underestimated the drive current and your driver is drawing down its supply rails. You may need some big decoupling caps and/or current-limiting resistors on the outputs.

#3

Could be the miller capacitance. This is an intrinsic capacitor that exists in all MOSFET devices and is between the drain and gate. When the drain of the top device is being pulled down by the lower device, there may be enough charge transferred to the gate to turn the device on. One way to prevent this is to ensure that the drive to the top device is of a low impedance and that it is actively turned off and not just left flapping in the breeze.

#4

Hi,
Welcome to the Forum.

imtiajimon33:
I have an h bridge using P type fets on the top and N type fets on the bottom.
Fets are STP80pf55 and STP80nf55.
I'm using a MC33035 bridge controller in a Brushed Motor configuration.
Top fets have a voltage divider resistor arrangement on the gate to manage gate voltages.
Both resistors are 1K limiting gate "on" voltage to half of the 24v supply.

The problem is that when the bottom fet is permitted to switch (PWM @ 10% duty cycle) the top fet on the same side of the bridge is turning partially on in sync with the bottom fet.
The voltage measured from ground to the bottom of the motor is a nice clean PWM signal pulsing down from 24v to 0v when the bottom fet is "on" and pulsing back up to 24v when the bottom fet is "off" as expected.

However the gate on the top fet on that side of the bridge, this being the one that is supposed to be "off", has a negative going pulse from 24v down to about 20v that is in perfect sync with the motor voltage as measured from ground.
This 4 volt difference between source and gate is enough to reach gate threshold and begin to turn on the fet.
It appears that the motor voltage switching on the side of the bridge where the bottom fet is active is influencing the gate voltage of the top fet on that same side.

I'm at a loss to understand this.

I have checked everything I know how on my PCB and it all looks good.

The board is 4 layer with planes and layout is tight.
No long runs between controller and fets.
No unwanted noise that I can see anywhere.
A previous version of this board made to run at 12v worked fine but now at 24v it's not.
I compared the signals on the 12v board and the unwanted signal is there on the gate of the same fet but it is small enough that it does not reach gate threshold.
The gate signal is not a blip, spike or noise but a 4v square pulse that is in sync with the signal on the drain and with matching duty cycle.
I can switch motor drive direction and produce the same results on the other side of the bridge and do this on either board so I don't think any of the fets are damaged.

Are parasitics to blame for this and if so how is this typically handled?

Thanks in advance for any help.
skip.ele

Sorry, but it is a bit to take in when a circuit diagram will replace the odd thousand words.

How much current are you controlling?

What MOSFETs were used in the 12V version?

Can you please post a copy of your circuit, in CAD or a picture of a hand drawn circuit in jpg, png?

Please read the first post in any forum entitled how to use this forum.
http://forum.arduino.cc/index.php/topic,148850.0.html

Thanks.. Tom.... :slight_smile:

#5

1k+1k resistor is pretty hopeless for the p-side MOSFET drive with those devices - they have a max gate
charge of perhaps 0.25uC at 12V, which means any gate resistor should be something like 30 ohms or
less for good clean PWM switching. With the 1k resistors the gate discharge time is something like
30 us, and charge up time half that. And resistors of a much lower value would be completely impractical
on heat-dissipation alone.

I suspect that's quite an elderly driver chip, modern drivers tend to use n-channel high
side switching with boot-strapping (floating) high side driver sections, which can handle high
gate currents and a wide range of operating voltages. You'd normally expect to put 200mA to 2A
into/outof the gates of big MOSFETs for good snappy switching. That means active drivers, not
resistor network.

#6